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MCP4531 Folha de dados(PDF) 39 Page - Microchip Technology

Nome de Peças MCP4531
Descrição Electrónicos  7/8-Bit Single/Dual I2C Digital POT with Nonvolatile Memory
PDF  102 Pages
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP4531 Folha de dados(HTML) 39 Page - Microchip Technology

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 2008-2013 Microchip Technology Inc.
DS22107B-page 39
MCP454X/456X/464X/466X
4.2.2.1
Status (STATUS) Register
This register contains four status bits. These bits show
the state of the WiperLock bits, the Write Protect bit,
and if an EEPROM write cycle is active. The STATUS
register can be accessed via the READ commands.
Register 4-1 describes each STATUS register bit.
The STATUS register is placed at Address 05h.
REGISTER 4-1:
STATUS REGISTER (ADDRESS = 0x05)
R-1
R-1
R-1
R-1
R-1
R-0
R-x
R-x
R-x
D8:D4
EEWA
WL1 (1)
WL0 (1)
WP (1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 8-4
D8:D4: Reserved. Forced to “1”
bit 3
EEWA: EEPROM Write Active Status bit
This bit indicates if the EEPROM Write Cycle is occurring.
1
=
An EEPROM Write cycle is currently occurring. Only serial commands to the Volatile memory
locations are allowed (addresses 00h, 01h, 04h, and 05h)
0
=
An EEPROM Write cycle is NOT currently occurring
bit 2
WL1: WiperLock Status bit for Resistor Network 1 (Refer to Section 5.3 “WiperLock™ Technology”
for further information)
WiperLock (WL) prevents the Volatile and Nonvolatile Wiper 1 addresses and the TCON register bits
R1HW, R1A, R1W, and R1B from being written to. High Voltage commands are required to enable and
disable WiperLock Technology.
1
=
Wiper and TCON register bits R1HW, R1A, R1W, and R1B of Resistor Network 1 (Pot 1) are
“Locked” (Write Protected)
0
=
Wiper and TCON of Resistor Network 1 (Pot 1) can be modified
Note:
The WL1 bit always reflects the result of the last programming cycle to the nonvolatile WL1
bit. After a POR or BOR event, the WL1 bit is loaded with the nonvolatile WL1 bit value.
bit 1
WL0: WiperLock Status bit for Resistor Network 0 (Refer to Section 5.3 “WiperLock™ Technology”
for further information)
The WiperLock Technology bits (WLx) prevents the Volatile and Nonvolatile Wiper 0 addresses and the
TCON register bits R0HW, R0A, R0W, and R0B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1
=
Wiper and TCON register bits R0HW, R0A, R0W, and R0B of Resistor Network 0 (Pot 0) are
“Locked” (Write Protected)
0
=
Wiper and TCON of Resistor Network 0 (Pot 0) can be modified
Note:
The WL0 bit always reflects the result of the last programming cycle to the nonvolatile WL0
bit. After a POR or BOR event, the WL0 bit is loaded with the nonvolatile WL0 bit value.
Note 1:
Requires a High Voltage command to modify the state of this bit (for nonvolatile devices only). This bit is
not directly written, but reflects the system state (for this feature).



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