AD9750 datasheet(14/22 Pages) AD

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AD9750

–14–

REV. 0

RLOAD

AD9750

MINI-CIRCUITS

T1-1T

OPTIONAL RDIFF

IOUTA

IOUTB

Figure 28. Differential Output Using a Transformer

The center tap on the primary side of the transformer must be

connected to ACOM to provide the necessary dc current path

for both IOUTA and IOUTB. The complementary voltages

appearing at IOUTA and IOUTB (i.e., VOUTA and VOUTB) swing

symmetrically around ACOM and should be maintained with

the specified output compliance range of the AD9750. A differ-

ential resistor, RDIFF, may be inserted in applications in which

the output of the transformer is connected to the load, RLOAD,

via a passive reconstruction filter or cable. RDIFF is determined

by the transformer’s impedance ratio and provides the proper

source termination which results in a low VSWR. Note that

approximately half the signal power will be dissipated across RDIFF.

DIFFERENTIAL USING AN OP AMP

An op amp can also be used to perform a differential to single-

ended conversion as shown in Figure 29. The AD9750 is con-

figured with two equal load resistors, RLOAD, of 25 Ω. The

differential voltage developed across IOUTA and IOUTB is

converted to a single-ended signal via the differential op amp

configuration. An optional capacitor can be installed across

IOUTA and IOUTB forming a real pole in a low-pass filter.

The addition of this capacitor also enhances the op amps distor-

tion performance by preventing the DACs high slewing output

from overloading the op amp’s input.

AD9750

IOUTA

IOUTB

COPT

500

225

500

AD8055

Figure 29. DC Differential Coupling Using an Op Amp

The common-mode rejection of this configuration is typically

determined by the resistor matching. In this circuit, the differ-

ential op amp circuit is configured to provide some additional

signal gain. The op amp must operate off of a dual supply since

its output is approximately

±1.0 V. A high speed amplifier such

as the AD8055 or AD8057 capable of preserving the differential

performance of the AD9750 while meeting other system level

objectives (i.e., cost, power) should be selected. The op amps

differential gain, its gain setting resistor values, and full-scale

output swing capabilities should all be considered when opti-

mizing this circuit.

The differential circuit shown in Figure 30 provides the neces-

sary level-shifting required in a single supply system. In this

case, AVDD which is the positive analog supply for both the

AD9750 and the op amp is also used to level-shift the differ-

ential output of the AD9750 to midsupply (i.e., AVDD/2). The

AD8041 is a suitable op amp for this application.

AD9750

IOUTA

IOUTB

COPT

500

225

AD8041

AVDD

Figure 30. Single-Supply DC Differential Coupled Circuit

SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT

Figure 31 shows the AD9750 configured to provide a unipolar

output range of approximately 0 V to +0.5 V for a doubly termi-

nated 50

Ω cable since the nominal full-scale current, I

OUTFS, of

20 mA flows through the equivalent RLOAD of 25 Ω. In this

case, RLOAD represents the equivalent load resistance seen by

IOUTA or IOUTB. The unused output (IOUTA or IOUTB)

can be connected to ACOM directly or via a matching RLOAD.

Different values of IOUTFS and RLOAD can be selected as long as

the positive compliance range is adhered to. One additional

consideration in this mode is the integral nonlinearity (INL) as

discussed in the ANALOG OUTPUT section of this data sheet.

For optimum INL performance, the single-ended, buffered

voltage output configuration is suggested.

AD9750

IOUTA

IOUTB

VOUTA = 0 TO +0.5V

IOUTFS = 20mA

Figure 31. 0 V to +0.5 V Unbuffered Voltage Output

SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT

CONFIGURATION

Figure 32 shows a buffered single-ended output configuration in

which the op amp U1 performs an I-V conversion on the AD9750

output current. U1 maintains IOUTA (or IOUTB) at a virtual

ground, thus minimizing the nonlinear output impedance effect

on the DAC’s INL performance as discussed in the ANALOG

OUTPUT section. Although this single-ended configuration

typically provides the best dc linearity performance, its ac distor-

tion performance at higher DAC update rates may be limited by

U1’s slewing capabilities. U1 provides a negative unipolar out-

put voltage and its full-scale output voltage is simply the

product of RFB and IOUTFS. The full-scale output should be set

within U1’s voltage output swing capabilities by scaling IOUTFS

and/or RFB. An improvement in ac distortion performance may

result with a reduced IOUTFS since the signal current U1 will be

required to sink will be subsequently reduced.

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