TTP/C-C1 Communications Controller Data Sheet

AS8201

Rev. NC, October 1999

Page 12 of 13

Austria Mikro Systeme International AG

Principles of Operatio n

The next 2 figures show a typical TTP/C node as it is to be deployed in a TTP/C

communication cluster. The circuit example uses the MAX1487 as driver, the host CPU may

be selected by the user and a 29F200 Flash memory. For detailed information the protocol on

application programming refer to the manuals provided by TTTech Computer Technik GmbH.

Sensor / Actor interface

Controller network interface (CNI)

TTP/C

Protocol

processor

Boot ROM

(external)

Instruction

memory

Configuration

memory

(MEDL)

Host CPU

Bus guardian

- Rx / Tx

Media Divers

TTP/C-C1

controller chip

TTP/C bus

Figure 9 Typical node in a TTP/C cluster using the TTP/C-C1

TTP/C-C1

controller

RAM_DATA[15:0]

RAM_ADDRESS[10:0]

RAM_CEB

RAM_OEB

RAM_WEB

RAM_READYB

TIME_OVERFLOW

TIME_SIGNAL

TIME_TICK

MICROTICK

XENA0

XIN0

XOUT0

RESETB

ROM_ADDRESS[16:0]

ROM_DATA[15:0]

ROM_RESETB

ROM_CEB

ROM_OEB

ROM_WEB

ROM_READY

TXD[0]

RXD[0]

CTS[0]

BDE[0]

OE[0]

TXD[1]

RXD[1]

CTS[1]

BDE[1]

OE[1]

XENA1

XIN1

XOUT1

TEST_SE

FTEST

FTEST_IEN

LED[7:0]

Host

CPU

Flash

EPROM

29F200

20 MHz

Quartz

16 MHz

Quartz

RE

DI

CL

DO

CH

DE

MAX1487

RE

DI

CL

DO

CH

DE

MAX1487

Bus0

Bus1

Figure 10 Typical application circuit