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MMPF0100 Folha de dados(PDF) 85 Page - Freescale Semiconductor, Inc

Nome de Peças MMPF0100
Descrição Electrónicos  14 Channel Configurable Power Management Integrated Circuit
PDF  136 Pages
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Fabricante Electrônico  FREESCALE [Freescale Semiconductor, Inc]
Página de início  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MMPF0100 Folha de dados(HTML) 85 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
85
PF0100
Functional Block Requirements and Behaviors
Power Generation
Besides the output voltage configuration, the LDOs can be enabled or disabled at anytime during normal mode operation, as well
as programmed to stay “ON” or be disabled when the PMIC enters Standby mode. Each regulator has associated I2C bits for
this. Table 93 presents a summary of all valid combinations of the control bits on VGENxCTL register and the expected behavior
of the LDO output.
Table 92. VGEN3/ 4/ 5/ 6 Output Voltage Configuration
Set Point
VGENx[3:0]
VGENx Output (V)
0
0000
1.80
1
0001
1.90
2
0010
2.00
3
0011
2.10
4
0100
2.20
5
0101
2.30
6
0110
2.40
7
0111
2.50
8
1000
2.60
9
1001
2.70
10
1010
2.80
11
1011
2.90
12
1100
3.00
13
1101
3.10
14
1110
3.20
15
1111
3.30
Table 93. LDO Control
VGENxEN
VGENxLPWR
VGENxSTBY
STANDBY(50)
VGENxOUT
0X
X
X
Off
10
0
X
On
1
1
0
X
Low Power
1X
1
0
On
10
1
1
Off
1
1
1
1
Low Power
Notes
50.
STANDBY refers to a Standby event as described earlier.



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