SST58LM024 datasheet(12/40 Pages) SST

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S71193-01-000

9/01

519

2.3.6 I/O Input (Read) Timing Specification

Note: All times are in nanoseconds. The maximum load on IOCS16# is 1 LSTTL with 50pF total load.

All AC specifications are guaranteed by design.

FIGURE 1: I/O READ TIMING DIAGRAM

TABLE

2-5: I/O READ TIMING

Item

Symbol

IEEE Symbol

Min

Max

Data Setup before IORD#

tsu(IORD)

tDVIRH

Data Hold following IORD#

th(IORD)

tlGHQX

IORD# Width Time

tw(IORD)

tlGLIGH

Valid Address Setup before IORD#

tsuA(IORD)

tAVIGL

Valid Address Hold following IORD#

thA(IORD)

tlGHAX

IOCS16# Delay Falling from Address

tdfIOCS16(ADR)

tAVISL

IOCS16# Delay Rising from Address

tdrIOCS16(ADR)

tAVISH

T2-5.4 519

519 ILL2-7.3

tdrIOCS16(ADR)

tdfIOCS16(ADR)

thA(IORD)

th(IORD)

tsuA(IORD)

tsu (IORD)

tw(IORD)

Valid Address1

IORD#

IOCS16#

D15-D0

Dout

1. Valid Address consists of signals CS1FX#, CS3FX#, and A2-A0.

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