TNETX3151PGV datasheet(7/65 Pages) TI1

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TNETX3151

ThunderSWITCH

™ 12/3 ETHERNET™ SWITCH

WITH 12 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS

SPWS048A – MARCH 1998 – REVISED APRIL 1999

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Terminal Functions (Continued)

10-/100-Mbit/s MAC interface (ports 12–14)†

TERMINAL

I/O

INTERNAL

DESCRIPTION

NAME

NO.

I/O

RESISTOR

DESCRIPTION

M12COL

M13COL

M14COL

Pulldown

Collision sense. Assertion of MxxCOL in half-duplex signal indicates a network collision

on that port. In full-duplex operation, transmission of new frames does not start if this

terminal is asserted.

M12CRS

M13CRS

M14CRS

Pulldown

Carrier sense. MxxCRS indicates a frame carrier signal is being received.

M12FORCE10

M13FORCE10

M14FORCE10

104

I/O‡

Pullup

Speed selection (force 10 Mbit/s is active low)

– If pulled low by either the TNETX3270 or a PHY, the port operates at 10 Mbit/s.

– If not pulled low by either the TNETX3270 or a PHY, the internal pullup resistor holds

this signal high and the port operates at 100 Mbit/s. An external 4.7-k

Ω pullup resistor

connected to VDD(3.3V) may be required, depending on the system layout.

M12LINK

M13LINK

M14LINK

102

Pulldown

Connection status. MxxLINK indicates the presence of a port connection.

– If MxxLINK = 0, there is no link.

– If MxxLINK = 1, the link is good.

M12FORCEHD

M13FORCEHD

M14FORCEHD

103

I/O‡

Pullup

Duplex selection (force half duplex is active low)

– If pulled low by either the TNETX3270 or the PHY, the port operates at half duplex.

– If not pulled low by either the TNETX3270 or the PHY, the internal pullup resistor holds

this signal high and the port operates at full duplex. An external 4.7-k

Ω pullup resistor

connected to VDD(3.3V) may be required, depending on the system layout.

M12RCLK

M13RCLK

M14RCLK

Pullup

Receive clock. Receive clock source from the attached PHY or physical medium interface

(PMI) device.

M12RXD3

M12RXD2

M12RXD1

M12RXD0

M13RXD3

M13RXD2

M13RXD1

M13RXD0

M14RXD3

M14RXD2

M14RXD1

M14RXD0

Pullup

Receive data (nibble receive data from the attached PHY or PMI device). Data on these

signals is synchronous to MxxRCLK. MxxRXD0 is the least significant bit and MxxRXD3

is the most significant bit.

M12RXDV

M13RXDV

M14RXDV

Pulldown

Receive data valid. When high, MxxRXDV indicates valid data is present on the

MxxRXD3–MxxRXD0 lines.

M12RXER

M13RXER

M14RXER

101

Pulldown

Receive error. When high, MxxRXER indicates a coding error on received data.

M12TCLK

M13TCLK

M14TCLK

Pullup

Transmit clock. Transmit clock source from the attached PHY or PMI device.

† xx = ports 12, 13, and 14

‡ Not a true bidirectional terminal. It can only be actively pulled down (open drain).

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