SP507 datasheet(16/28 Pages) SIPEX

16 / 28 page

Rev: A Date:1/27/04

SP507 Multi–Mode Serial Transceiver

PINOUT (QFP)

PIN ASSIGNMENTS

CLOCK AND DATA GROUP

Pin 1 — RxD — Receive Data; TTL output,

sourced from RD(a) and RD(b) inputs.

Pin 14 — TxD — TTL input ; transmit data

source for SD(a) and SD(b) outputs.

Pin 15 — TxCE — Transmit Clock; TTL input

for TT driver outputs.

Pin 20 — RxC — Receive Clock; TTL output

sourced from RT(a) and RT(b) inputs.

Pin 22 — DCE_ST — Send Timing; TTL input;

source for ST(a) and ST(b) outputs.

Pin 37 — RT(a) — Receive Timing; analog

input, inverted; source for RxC.

Pin 38 — RT(b) — Receive Timing; analog

input, non-inverted; source for RxC.

Pin 42 — ST(a) — Send Timing; analog output,

inverted; sourced from DCE_ST.

Pin 44 — ST(b) — Send Timing; analog output,

non-inverted; sourced from DCE_ST.

Pin 59 — SD(b) — Analog Out — Send data,

non-inverted; sourced from TxD.

Pin 61 — SD(a) — Analog Out — Send data,

inverted; sourced from TxD.

Pin 63 — TT(a) — Analog Out — Terminal

Timing, inverted; sourced from TxCE.

Pin 65 — TT(b) — Analog Out — Terminal

Timing, non–inverted; sourced from TxCE.

Pin 70 — RD(a) — Receive Data, analog input;

inverted; source for RxD.

Pin 71 — RD(b) — Receive Data; analog input;

non-inverted; source for RxD.

Pin 76 — SCT(a) — Serial Clock Transmit;

analog input, inverted; source for DCE_ST.

Pin 77 — SCT(b) — Serial Clock Transmit:

analog input, non–inverted; source for DCE_ST.

Pin 79 — DTE_ST — Serial Clock Transmit;

TTL output; sources from SCT(a) and SCT(b)

inputs.

CONTROL LINE GROUP

Pin 13 — DTR — Data Terminal Ready; TTL

input; source for TR(a) and TR(b) outputs.

Pin 16 — RTS — Ready To Send; TTL input;

source for RS(a) and RS(b) outputs.

Pin 17 — RL — Remote Loopback; TTL input;

source for RL(a) and RL(b) outputs.

Pin 19 — DCD— Data Carrier Detect; TTL

output; sourced from RR(a) and RR(b) inputs.

Pin 21 — TM — Ring In; TTL output; sourced

from TM(a) and TM(b) inputs.

Pin 24 — LL — Local Loopback; TTL input;

source for LL(a) and LL(b) outputs.

Pin 35 — RR(a)— Receiver Ready; analog

input, inverted; source for DCD.

Pin 36 — RR(b)— Receiver Ready; analog

input, non-inverted; source for DCD.

Pin 39 — TM(a)— Incoming Call; analog input,

inverted; source for TM.

Pin 40 — TM(b)— Incoming Call; analog input,

non-inverted; source for TM.

RxD 1

RTEN 2

RREN 3

TMEN 4

LLEN 5

TTEN 6

SCTEN 7

LATCH 8

TERM_OFF 9

M2 10

M1 11

M0 12

DTR 13

TxD 14

TxCE 15

RTS 16

RL 17

RLEN 18

DCD 19

RxC 20

60 GND

59 SD(b)

58 TR(a)

57 GND

56 TR(b)

55 VCC

54 RS(a)

53 GND

52 RS(b)

51 LL(a)

50 GND

49 LL(b)

48 VCC

47 RL(a)

46 GND

45 RL(b)

44 ST(b)

43 GND

42 ST(a)

41 VCC

SP507

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