ADP1853ACPZ-R7 datasheet(20/28 Pages) AD

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ADP1853

Data Sheet

Rev. 0 | Page 20 of 28

There is also additional power loss during the time, known as

dead time, between the turn-off of the high-side switch and the

turn-on of the low-side switch, when the body diode of the low-

side MOSFET conducts the output current. The power loss in

the body diode is given by

BODYDIODE

where:

VF is the forward voltage drop of the body diode, typically 0.7 V.

tD is the dead time in the ADP1853, typically 30 ns when

driving a medium size MOSFETs with input capacitance, Ciss,

of approximately 3 nF. The dead time is not fixed. Its effective

value varies with gate drive resistance and Ciss; therefore,

PBODYDIODE increases in high load current designs and low voltage

designs.

Then the power loss in the low-side MOSFET is

BODYDIODE

CLS

Note that MOSFET on resistance, RDSON, increases with

increasing temperature with a typical temperature coefficient of

0.4%/oC. The MOSFET junction temperature (TJ) rise over the

ambient temperature is

TJ = TA + θJA × PD

where:

θJA is the thermal resistance of the MOSFET package.

TA is the ambient temperature.

PD is the total power dissipated in the MOSFET.

LOOP COMPENSATION—VOLTAGE MODE

Set the controller to voltage mode operation by placing a

100 kΩ resistor between DL and PGND. Chose the larger

possible ramp amplitude for the voltage mode below 1.5 V.

The ramp voltage is programmed by a resistor value between

VIN and the RAMP pin:

RAMP

−

100

The voltage at the RAMP pin is fixed at 0.2 V, and the current

going into RAMP should be between 10 µA and 160 µA. Make

sure that the following condition is satisfied:

μA

160

μA

≤

−

≤

RAMP

(1)

For instance, with an input voltage of 12 V, RRAMP should not be

less than 73.8 kΩ.

Assuming that the LC filter design is complete, the feedback

control system can be compensated. In general, aluminum

electrolytic capacitors have high ESR; however, if several

aluminum electrolytic capacitors are connected in parallel and

produce a low effective ESR, then Type III compensation is

needed. In addition, ceramic capacitors have very low ESR (only

a few milliohms) making Type III compensation a better choice.

Type III Compensation

Figure 27. Type III Compensation

If the output capacitor ESR zero frequency is greater than ½ of

the crossover frequency, use the Type III compensator as shown

in Figure 27.

Calculate the output LC filter resonant frequency as follows:

fLC

(2)

Chose a crossover frequency that is 1/10 of the switching

frequency:

f =

(3)

Set the poles and zeros as follows:

(4)

(5)

(6)

Use the lower zero frequency from Equation 5 or Equation 6.

Calculate the compensator resistor, RZ, as follows:

RAMP

TOP

R =

(7)

Next, calculate CI:

(8)

Because of the finite output current drive of the error amplifier,

CI needs to be less than 10 nF. If it is larger than 10 nF, choose a

larger RTOP and recalculate RZ and CI until CI is less than 10 nF.

(dB)

PHASE

–90°

–270°

CHF

RFF

RTOP

RBOT

VOUT

INTERNAL

VREF

COMP

–1

OPE

–1

OPE

CFF

OPE

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