STM32F407IG datasheet(22/154 Pages) STMICROELECTRONICS

22 / 154 page

Description

STM32F405xx, STM32F407xx

22/154

Doc ID 022152 Rev 1

2.2.15

Power supply supervisor

The power supply supervisor is enabled by holding PDR_ON high.

The device has an integrated power-on reset (POR) / power-down reset (PDR) circuitry

coupled with a Brownout reset (BOR) circuitry. At power-on, BOR is always active, and

ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold level is reached,

the option byte loading process starts, either to confirm or modify default thresholds, or to

disable BOR permanently. Three BOR thresholds are available through option bytes.

The device remains in reset mode when VDD is below a specified threshold, VPOR/PDR or

VBOR, without the need for an external reset circuit.

The device also features an embedded programmable voltage detector (PVD) that monitors

the VDD/VDDA power supply and compares it to the VPVD threshold. An interrupt can be

generated when VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA is higher

than the VPVD threshold. The interrupt service routine can then generate a warning

message and/or put the MCU into a safe state. The PVD is enabled by software.

All packages, except the LQFP64, offer the internal reset is controlled through the PDR_ON

signal.

2.2.16

Voltage regulator

The regulator has eight operating modes:

●

Regulator ON/internal reset ON

–

Main regulator mode (MR)

–

Low power regulator (LPR)

–

Power-down

●

Regulator ON/internal reset OFF

–

Main regulator mode (MR)

–

Low power regulator (LPR)

–

Power-down

●

Regulator OFF/internal reset ON

●

Regulator OFF/internal reset OFF

Regulator ON

●

Regulator ON/internal reset ON

The regulator ON/internal reset ON mode is always enabled on LQFP64 package.

On LQFP100 and LQFP144 packages, this mode is activated by setting PDR_ON to

VDD.

On UFBGA176 package, the internal regulator must be activated by connecting

BYPASS_REG to VSS, and PDR_ON to VDD.

On LQFP176 packages, the internal reset must be activated by connecting PDR_ON to

VDD.

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