MCP14E9 datasheet(13/30 Pages) MICROCHIP

13 / 30 page

DS25005A-page 13

MCP14E9/10/11

4.0

APPLICATION INFORMATION

4.1

General Information

MOSFET drivers are high-speed, high-current devices

which are intended to source/sink high-peak currents to

charge/discharge the gate capacitance of external

MOSFETs, or insulated gate bipolar transistors

(IGBTs). In high-frequency switching power supplies,

the Pulse-Width Modulation (PWM) controller may not

have the drive capability to directly drive the power

MOSFET. MOSFET drivers, like the MCP14E9/10/11

family, can be used to provide additional source/sink

current capability.

An additional degree of control has been added to the

MCP14E9/10/11 family. There are seperate enable

functions for each driver that allow for the immediate

termination of the output pulse, regardless of the state

of the input signal.

4.2

MOSFET Driver Timing

The ability of a MOSFET driver to transition from a fully

OFF state to a fully ON state are characterized by the

drivers’ rise time (tR), fall time (tF) and propagation

delays (tD1 and tD2). The MCP14E9/10/11 family of driv-

ers can typically charge and discharge an 1800 pF load

capacitance in approximately 15 ns, along with a typical

matched propagation delay of 45 ns. Figure 4-1 and

Figure 4-2 show the test circuit and timing waveform

used to verify the MCP14E9/10/11 timing.

FIGURE 4-1:

Inverting Driver Timing

Waveform.

FIGURE 4-2:

Non-Inverting Driver Timing

Waveform.

4.3

Enable Function

The ENB_A and ENB_B enable pins allow the indepen-

dent control of OUT A and OUT B, respectively. They

are active-high and are internally pulled up to VDD, so

that the default state is to enable the driver. These pins

can be left floating for normal operation.

When an enable pin voltage is above the enable pin

high threshold voltage, VEN_H, that driver output is

enabled and allowed to react to changes in the INPUT

pin voltage state. Similarly, when the enable pin voltage

falls below the enable pin low threshold voltage, VEN_L,

that driver output is disabled and does not respond to

the changes in the INPUT pin voltage state. When the

driver is disabled, the output goes to a low state. Refer

to Table 4-1 for enable pin logic. The threshold voltages

of the enable function are compatible with logic levels.

Hysteresis is provided to help increase the noise immu-

nity of the enable function, avoiding false triggers of the

enable signal during driver switching. For robust

designs, it is recommended that the slew rate of the

enable pin signal be greater than 1V/ns.

There are propagation delays associated with the

driver receiving an enable signal and the output

reacting. These propagation delays, tD3 and tD4, are

graphically represented in Figure 4-3.

0.1 µF

+5V

10%

90%

10%

90%

10%

90%

18V

1µF

CL = 1800 pF

Input

Output

tD1

tD2

Output

VDD = 18V

Ceramic

CL = 1800 pF

Input

Output

MCP14E9

½ MCP14E11

90%

Input

tD1

tD2

Output

10%

+5V

18V

90%

0.1 µF

1µF

CL =1800pF

Input

Output

DD =18V

Ceramic

CL = 1800 pF

Input

Output

MCP14E9

½ MCP14E11

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