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FX802LS Folha de dados(PDF) 11 Page - CML Microcircuits

Nome de Peças FX802LS
Descrição Electrónicos  DVSR CODEC
PDF  14 Pages
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Fabricante Electrônico  CMLMICRO [CML Microcircuits]
Página de início  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

FX802LS Folha de dados(HTML) 11 Page - CML Microcircuits

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Timing Information
Fig.6 Codec Direct Access Timing
NOT TO SCALE
DECODER TIMING
ENCODER CLOCK
ENCODER DATA
BITS OUT
t
PCO
t
CH
t
CL
DECODER CLOCK
DECODER DATA
BITS IN
t
CH
t
CL
ENCODER TIMING
t
SU
Data True Time
t H
Data Clocked
Data Clocked
Fig.5 “C-BUS” Timing Information
NOT TO SCALE
Direct Access Timing – Figure 6
Parameter
Min.
Typ
Max.
Unit
t
CH
1.0
–
–
µs
t
CL
1.0
–
–
µs
t
SU
450
–
–
ns
t
H
600
–
–
ns
t
PCO
–
–
750
ns
t
SU + tH
= Data True Time
“C-BUS” Timing – Figure 5
Parameter
Min.
Max.
Unit
abc
t
CSE
2.0
4.0
8.0
–
µs
t
CSH
4.0
4.0
8.0
–
µs
t
HIZ
–––
2.0
µs
t
CSOFF
2.0
4.0
8.0
–
µs
t
NXT
4.0
8.0
16.0
–
µs
t
CK
2.0
4.0
8.0
–
µs
Notes
(1)
Minimum Timing Values
(a)
For all commands except “Read Data” and “Write Data” commands.
(b)
For “Read Data” and “Write Data” commands when no “Speech Store” or “Speech Play” commands are active.
(c)
For “Read Data” and “Write Data” commands when “Speech Store” or “Speech Play” commands are active.
(2)
Depending on the command, 1 or 2 bytes of Command Data are transmitted to the peripheral MSB (bit7) first, LSB
(bit0) last. Reply Data is read from the peripheral MSB (bit7) first, LSB (bit0) last.
(3)
To allow for differing
µController serial interface formats “C-BUS” compatible ICs are able to work with either polarity
Serial Clock pulses.
(4)
Data sent from the
µController is clocked into the FX802 on the rising edge of the Serial Clock pulses. Reply Data
sent from the FX802 to the
µController is clocked into the µController when the Serial Clock is “high.”
(5)
Loaded commands are acted upon at the end of each command.
Direct Access
SERIAL CLOCK
COMMAND DATA
t
CSE
t NXT
t
CSOFF
t CSH
t
HIZ
ADDRESS/COMMAND
BYTE
FIRST DATA BYTE
LAST DATA BYTE
7
6
5
4321
0
7
65
4321
0
7
6
5
4
321
0
76
5
4
321
0
MSB
LSB
CHIP SELECT
LAST REPLY DATA BYTE
t
CK
REPLY DATA
MSB
LSB
FIRST REPLY DATA BYTE
Logic level is not important
76
5
4321
0
t
NXT



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