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MPC8572ECLPXATLD Folha de dados(PDF) 121 Page - Freescale Semiconductor, Inc

Nome de Peças MPC8572ECLPXATLD
Descrição Electrónicos  MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
PDF  140 Pages
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Fabricante Electrônico  FREESCALE [Freescale Semiconductor, Inc]
Página de início  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8572ECLPXATLD Folha de dados(HTML) 121 Page - Freescale Semiconductor, Inc

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
121
Clocking
Note that the DDR PLL reference clock input, DDRCLK, is only required in asynchronous mode.
MPC8572E does not support running one DDR controller in synchronous mode and the other in
asynchronous mode.
19.5
Frequency Options
19.5.1
Platform to Sysclk Frequency Options
Table 82 shows the expected frequency values for the platform frequency when using the specified CCB
clock to SYSCLK ratio.
Table 81. DDR Clock Ratio
Binary Value of
TSEC_1588_CLK_OUT,
TSEC_1588_PULSE_OUT1,
TSEC_1588_PULSE_OUT2 Signals
DDR:DDRCLK Ratio
000
3:1
001
4:1
010
6:1
011
8:1
100
10:1
101
12:1
110
14:1
111
Synchronous mode
Table 82. Frequency Options for Platform Frequency
CCB to
SYSCLK Ratio
SYSCLK (MHz)
33.33
41.66
50
66.66
83
100
111
133.33
Platform /CCB Frequency (MHz)
4
400
444
533
5
415
500
555
6
400
498
600
8
400
533
10
417
500
12
400
500
600



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