EEPROM-Programmable, Octal/Hex/Quad,

Power-Supply Sequencers/Supervisors

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21

REGISTER

ADDRESS

EEPROM

MEMORY

ADDRESS

BIT

OUTPUT ASSERTION CONDITIONS

[0]

1 = PO5 assertion depends on IN1 undervoltage threshold (Table 2)

[1]

1 = PO5 assertion depends on IN2 undervoltage threshold (Table 3)

[2]

1 = PO5 assertion depends on IN3 undervoltage threshold (Table 3)

[3]

1 = PO5 assertion depends on IN4 undervoltage threshold (Table 3)

[4]

1 = PO5 assertion depends on IN5 (MAX6889/MAX6890 only) undervoltage threshold

(Table 3)

[5]

1 = PO5 assertion depends on IN6 (MAX6889/MAX6890 only) undervoltage threshold

(Table 3)

[6]

1 = PO5 assertion depends on IN7 (MAX6890 only) undervoltage threshold (Table 3)

16h

96h

[7]

1 = PO5 assertion depends on IN8 (MAX6890 only) undervoltage threshold (Table 4)

[0]

1 = PO5 assertion depends on watchdog (Table 20)

[1]

1 = PO5 assertion depends on GPI1 (Table 5)

[2]

1 = PO5 assertion depends on GPI2 (Table 5)

[3]

1 = PO5 assertion depends on GPI3 (Table 5)

[4]

1 = PO5 assertion depends on GPI4 (MAX6889/MAX6890 only) (Table 5)

[5]

1 = PO5 asserts when

MR = low (Table 6)

17h

17h

[7:6]

Not used

Table 11. PO5 Output Dependency

Note: Table 11 only applies to PO5. Write a “0” to a bit to make the PO5 output independent of the respective signal (IN_ thresholds,

WD, GPI_, or MR).