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PIC16F720-E/ML Folha de dados(PDF) 59 Page - Microchip Technology

Nome de Peças PIC16F720-E/ML
Descrição Electrónicos  20-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  244 Pages
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F720-E/ML Folha de dados(HTML) 59 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS41430A-page 59
PIC16F/LF720/721
6.2.4
PIN DESCRIPTIONS AND
DIAGRAMS
Each PORTB pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the SSP, I2C™ or interrupts, refer to the
appropriate section in this data sheet.
6.2.4.1
RB4/AN10/SDI/SDA
Figure 6-7 shows the diagram for this pin. The RB4 pin
is configurable to function as one of the following:
• General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
• Analog input for the A/D
• Synchronous Serial Port Input (SPI)
•I2C data I/O
6.2.4.2
RB5/AN11/RX/DT
Figure 6-8 shows the diagram for this pin. The RB5 pin
is configurable to function as one of the following:
• General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
• Analog input for the A/D
• USART asynchronous receive
• USART synchronous receive
6.2.4.3
RB6/SCK/SCL
Figure 6-9 shows the diagram for this pin. The RB6 pin
is configurable to function as one of the following:
• General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
• Synchronous Serial Port clock for both SPI and
I2C
6.2.4.4
RB7/TX/CK
Figure 6-10 shows the diagram for this pin. The RB7
pin is configurable to function as one of the following:
• General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
• USART asynchronous transmit
• USART synchronous clock
FIGURE 6-7:
BLOCK DIAGRAM OF RB4
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPUB
RD
WPUB
RD PORTB
RD
PORTB
WR
PORTB
WR
TRISB
RD
TRISB
WR
IOCB
RD
IOCB
Interrupt-on-
To SSP
Analog(1)
Input mode
RABPU
Analog(1)
Input mode
Change
Q3
To A/D Converter
ST
SSPEN
0
1
1
0
Note
1:
ANSEL determines Analog Input mode.
0
1
1
0
SSP
From
SSP



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