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ADIS16133/PCBZ Folha de dados(PDF) 4 Page - Analog Devices

Nome de Peças ADIS16133/PCBZ
Descrição Electrónicos  짹1200째/sec Precision Angular Rate Sensor
PDF  20 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADIS16133/PCBZ Folha de dados(HTML) 4 Page - Analog Devices

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ADIS16133
Rev. 0 | Page 4 of 20
TIMING SPECIFICATIONS
TA = 25°C, VCC = 5 V, unless otherwise noted.
Table 2.
Normal Mode
Parameter
Description
Min1
Typ
Max
Unit
f
SCLK
Serial clock
0.01
2.0
MHz
t
STALL
Stall period between data
9
µs
t
READRATE
Read rate
25
µs
t
CS
Chip select to clock edge
48.8
ns
t
DAV
DOUT valid after SCLK edge
25
ns
t
DSU
DIN setup time before SCLK rising edge
24.4
ns
t
DHD
DIN hold time after SCLK rising edge
48.8
ns
t
SCLKR, tSCLKF
SCLK rise/fall times
5
12.5
ns
t
DR, tDF
DOUT rise/fall times
5
12.5
ns
t
SFS
CS high after SCLK edge
0
ns
t
1
Input sync positive pulse width
5
µs
t
x
Input sync low time
100
µs
t
2
Input sync to data ready output
360
µs
t
3
Input sync period
488
µs
1 Guaranteed by design and characterization but not tested in production.
Timing Diagrams
CS
SCLK
DOUT
DIN
1
2
3
4
5
6
15
16
R/W
A5
A6
A4
A3
A2
D2
MSB
DB14
D1
LSB
DB13
DB12
DB10
DB11
DB2
LSB
DB1
tCS
tSFS
tDAV
tDHD
tDSU
Figure 2. SPI Timing and Sequence
CS
SCLK
tREADRATE
tSTALL
Figure 3. Stall Time and Data Rate
t3
tX
t2
t1
SYNC
CLOCK (CLKIN)
DATA
READY
Figure 4. Input Clock Timing Diagram



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