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Preliminary
4-223
RF2371
Rev A2 010205
4
Pin
Function
Description
Interface Schematic
1RF IN
RF input pin. This pin is not internally DC blocked and requires an
external blocking capacitor.
2GND1
Ground connection for the LNA. Keep traces physically short and con-
nect immediately to ground plane for best performance.
3GND2
Ground connection for the bias circuits.
4
IPSET
This pin selects the internal current setting when CMOS level “low”, and
the external current setting when this pin is CMOS level “high”.
5
ENABLE
Power down control. This is a CMOS input. When this pin is CMOS
“high” the device is enabled. When the level is CMOS “low” the device
is shut off and a controlled attenuator is turned on.
6VCC
Power supply for the bias circuits.
7
ISET
This pin sets the current for the device.
8RF OUT
RF output pin. Bias for the LNA is provided through this pin, hence it
should be connected to VCC through an inductor.
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