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CS1600-FSZ Folha de dados(PDF) 12 Page - Cirrus Logic

Nome de Peças CS1600-FSZ
Descrição Electrónicos  LOW-cost PFC Controller for Electronic Ballasts
PDF  18 Pages
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Fabricante Electrônico  CIRRUS [Cirrus Logic]
Página de início  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS1600-FSZ Folha de dados(HTML) 12 Page - Cirrus Logic

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CS1600
12
DS904A7
5.1.3
PFC Boost Inductor
Equation 3 can be rewritten to calculate the PFC boost
Inductor, LB, as follows:
The RMS current rating for the inductor can be estimated as
follows:
The peak inductor current, ILB(pk), may be estimated using the
following equation:
Inductor tolerances should be considered when estimating the
peak currents present in the application.
The internal control algorithm of the controller dictates that the
peak inductor current seen in the application could be as high
as a pre-defined threshold of 0.001984 times the inverse of
the inductor, which in this example amounts to 4.72 A. Care
needs to be taken to ensure that the saturation current rating
of the PFC boost inductor factors in this threshold used for the
protection schemes.
5.1.4
PFC MOSFET
The peak voltage stress on the PFC MOSFET is a diode drop
above the output voltage. Accounting for leakage spikes, for
the 460 V output application, a 600 V FET is recommended.
The FET should be able to handle the same peak current as
that seen through the inductor. This would amount to 3.17 A.
The minimum RMS current rating, IFET(rms), required for the
FET is calculated as follows:
5.1.5
PFC Diode
The PFC diode peak current is equal to the inductor peak
current:
The PFC diode average current is calculated as follows:
5.1.6
PFC Output Capacitor
The output capacitor needs to be designed to meet the voltage
ripple and hold-up time requirements. In the case of a cost-
sensitive ballast application, the hold-up requirement is not a
key requirement.
The CS1600 has been designed to operate with a low output
capacitance of approximately 0.2
μF per watt of output power.
For this specific application:
The 120 Hz ripple on the output capacitor may be estimated
using the following equation:
where
Cout = Output Capacitance value
Po = Output Power
fline(min) = Minimum Line Frequency
Vlink = PFC Output Voltage
ΔVlink = Peak-Peak Voltage Ripple on the PFC Output
α
V
link
400V
--------------
90V
V
in min
()
--------------------
×


2
V
link
V
link
400V
--------------
90V
×
2
×


–
V
link
V
in min
()
2
×
–
---------------------------------------------------------------------
×
=
[Eq.6]
α
V
link
400V
--------------
90V
V
in min
()
--------------------
×


2 Vlink
V
link
400V
--------------
90V
×
2
×


–
V
link
V
in min
()
2
×
–
---------------------------------------------------------------------
×
0.937
==
L
B
αη
V
in min
()
()
2
×
×
V
link
V
in min
()
2
×
()
–
2f
max
P
O
V
link
×
×
×
---------------------------------------------------------
×
=
[Eq.6]
L
B
0.937
0.95 108
×
2
×
460
108
2
×
–
()
27010
3
×
115
460
×
×
×
----------------------------------------------------------------
×
431
μH
==
I
LB rms
()
P
O
V
in min
()
η
×
------------------------------
=
I
LB rms
()
1.12A
=
I
LB rms
()
115
108
0.95
×
----------------------------
=
[Eq.7]
I
LB pk
()
4
P
O
×
η V
×
in min
()
2
×
--------------------------------------------
=
I
LB pk
()
3.17 A
=
I
LB pk
()
4
115
×
0.95
108
×
2
×
-----------------------------------------
=
[Eq.8]
I
FET rms
()
P
O
V
in min
()
η
×
------------------------------
=
I
LB rms
()
1.12A
=
I
LB rms
()
115
108
0.95
×
----------------------------
=
[Eq.9]
I
Dpk
()
I
LB pk
()
=
I
Dpk
()
3.17 A
=
[Eq.10]
I
Davg
()
P
O
V
link
------------
=
I
Davg
()
0.25 A
=
I
Davg
()
115
460
----------
=
[Eq.11]
C
out
0.2
μF
W
----------------
115W
×
23
μF
==
[Eq.12]
ΔV
link rip
()
P
O
2
π f
line min
()
×
V
link
×
C
out
×
------------------------------------------------------------------------
=
115
2
π 45
×
460
×
23
×
-------------------------------------------------
=
40.2V
=



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