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CDCE706 Folha de dados(PDF) 16 Page - Texas Instruments

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Nome de Peças CDCE706
Descrição Electrónicos  PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER
PDF  40 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

CDCE706 Folha de dados(HTML) 16 Page - Texas Instruments

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PLL1
XO
or
2LVCMOS
or
Differential
Input
MUX
MUX
PLL3
PFD
Filter
VCO
PLL2
w/SSC
PFD
Filter
VCO
S0/CLK_SEL
S1
SCLOCK
OutputSwitchMatrix
LV
CMOS
LV
CMOS
EEPROM
LOGIC
SMBUS
LOGIC
PFD
Filter
VCO
SDATA
Y0
Y1
f
=225.792MHz
VCO3
f
=250MHz
VCO2
f
=216MHz
VCO1
MUX
P0-Div
10
DividerN
8
DividerM
27
DividerN
250
DividerM
375
DividerN
3136
CLK_IN1
CLK_IN0
LV
CMOS
LV
CMOS
Y2
Y3
LV
CMOS
LV
CMOS
Y4
Y5
SSC
Off
B0336-01
14pF
14pF
P1-Div
20
P3-Div
9
P4-Div
32
P5-Div
4
27MHz
27MHz
27MHz
27MHz
27MHz
27MHz
DividerM
1
P2-Div
8
in
out
out
f
N
27 MHz 8
f
, i.e., f
27 MHz
M P
(1 8)
´
´
=
=
=
´
´
(1)
CDCE706
SCAS815I – OCTOBER 2005 – REVISED NOVEMBER 2008 ........................................................................................................................................... www.ti.com
NOTE: All outputs are enabled and in noninverting mode. S0, S1, and SSC comply according the default setting described in
byte 10 and byte 25.
Figure 13. Default Device Setting
The output frequency can be calculated:
16
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Copyright © 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): CDCE706



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