STA015 datasheet(35/56 Pages) STMICROELECTRONICS

Nome de Peças	STA015

Descrição Electrónicos	MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY

PDF	56 Pages

Scroll/Zoom	100%

Fabricante Electrônico	STMICROELECTRONICS [STMicroelectronics]

Página de início	http://www.st.com

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STA015

Address: 0x67, 0x68, 0x69 (103 - 104 - 105)

Type: RO

Software Reset: 0x00

Hardware Reset: 0x00

The three registers are considered logically concatenated and compose the Global Frame Counter as de-

scribed in the table.

It is updated at every decoded MPEG Frame. The registers are reset on both hardware and software reset.

AVERAGE_BITRATE

Address: 0x6A (106)

Type: RO

Software Reset: 0x00

Hardware Reset: 0x00

AVERAGE_BITRATE is a read-only register and it contains the average bitrate of the incoming bitstream

divided by two.

The value is rounded with an accuracy of 1 Kbit/sec.

SOFTVERSION

Address: 0x71 (113)

Type: RO

After the STA015 boot, this register contains the version code of the embedded software.

RUN

Address: 0x72 (114)

Type: RW

Software Reset: 0x00

Hardware Reset: 0x00

Setting this register to 1, STA015 leaves the idle state, starting the decoding process.

The Microcontroller is allowed to set the RUN flag, once all the control registers have been initialized.

MSB

LSB

AB7

AB6

AB5

AB4

AB3

AB2

AB1

AB0

MSB

LSB

SV7

SV6

SV5

SV4

SV3

SV2

SV1

SV0

MSB

LSB

XXXX

RUN

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