PCIMX258CJM4A datasheet(46/144 Pages) FREESCALE

46 / 144 page

i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3

Freescale Semiconductor

Figure 12 gives timing waveforms for PIO write mode.

Figure 12. PIO Write Mode Timing

To meet PIO write mode timing requirements, a number of timing parameters must be controlled. Table 35

shows timing parameters and their determining relations, and indicates parameters that can be adjusted to

meet required conditions.

Table 35. Timing Parameters for PIO Write Mode

ATA

Parameter

PIO Write

Mode Timing

Parameter1

1 See Figure 12.

Relation

Adjustable Parameter(s)

t1(min.) = time_1

× T – (tskew1 + tskew2 + tskew5)

time_1

t2w

t2(min.) = time_2w

× T – (tskew1 + tskew2 + tskew5)

time_2w

t9(min.) = time_9

× T – (tskew1 + tskew2 + tskew6)

time_9

—

t3(min.) = (time_2w – time_on)

× T – (tskew1 + tskew2 +tskew5)

if not met, increase time_2w

t4(min.) = time_4

× T – tskew1

time_4

tA = (1.5 + time_ax)

× T – (tco + tsui + tcable2 + tcable2 + 2 × tbuf)

time_ax

—

t0(min.) = (time_1 + time_2 + time_9)

× T

time_1, time_2r, time_9

—

Avoid bus contention when switching buffer on by making ton long

enough

—

Avoid bus contention when switching buffer off by making toff long

enough

—

ADDR

(See note 1)

DIOW

Write Data(15:0)

IORDY

t2w

buffer_en

ton

t4 toff

DIOR

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