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STM32F100R4 Folha de dados(PDF) 67 Page - STMicroelectronics

Nome de Peças STM32F100R4
Descrição Electrónicos  Low & medium-density value line, advanced ARM-based 32-bit MCU Low & medium-density value line, advanced ARM-based 32-bit MCU
PDF  84 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F100R4 Folha de dados(HTML) 67 Page - STMicroelectronics

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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Electrical characteristics
Doc ID 16455 Rev 2
67/84
The above formula (Equation 1) is used to determine the maximum external impedance allowed for an
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Note:
ADC accuracy vs. negative injection current: Injecting a negative current on any of the
standard (non-robust) analog input pins should be avoided as this significantly reduces the
accuracy of the conversion being performed on another analog input. It is recommended to
add a Schottky diode (pin to ground) to standard analog pins which may potentially inject
Table 42.
RAIN max for fADC = 12 MHz
(1)
1.
Guaranteed by design, not tested in production.
Ts (cycles)
tS (µs)
RAIN max (k)
1.5
0.125
0.4
7.5
0.625
5.9
13.5
1.125
11.4
28.5
2.375
25.2
41.5
3.45
37.2
55.5
4.625
50
71.5
5.96
NA
239.5
20
NA
Table 43.
ADC accuracy - limited test conditions(1)(2)
1.
ADC DC accuracy values are measured after internal calibration.
2.
Based on characterization, not tested in production.
Symbol
Parameter
Test conditions
Typ
Max
Unit
ET
Total unadjusted error
fPCLK2 = 24 MHz,
fADC = 12 MHz, RAIN < 10 k,
VDDA = 3 V to 3.6 V
TA = 25 °C
Measurements made after
ADC calibration
±1.3
±2
LSB
EO
Offset error
±1
±1.5
EG
Gain error
±0.5
±1.5
ED
Differential linearity error
±0.7
±1
EL
Integral linearity error
±0.8
±1.5
Table 44.
ADC accuracy(1) (2)
1.
ADC DC accuracy values are measured after internal calibration.
2.
Better performance could be achieved in restricted VDD, frequency, VREF and temperature ranges.
Symbol
Parameter
Test conditions
Typ
Max(3)
3.
Based on characterization, not tested in production.
Unit
ET
Total unadjusted error
fPCLK2 = 24 MHz,
fADC = 12 MHz, RAIN < 10 k,
VDDA = 2.4 V to 3.6 V
Measurements made after
ADC calibration
±2
±5
LSB
EO
Offset error
±1.5
±2.5
EG
Gain error
±1.5
±3
ED
Differential linearity error
±1
±2
EL
Integral linearity error
±1.5
±3



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