AS5311

Data Sheet

www.austriamicrosystems.com

Revision 1.01

5 - 23

5

Pinout

5.1

Pin Assignments

Figure 4: AS5311 Pin Configuration, TSSOP-20

2

3

4

5

6

7

8

13

14

15

16

17

18

19

20

1

NC

MagIncn

MagDecn

A

B

NC

Index

VSS

CLK

CSn

PWM

NC

NC

VDD3V3

VDD5V

9

12

DO

Prog

10

11

NC

NC

NC

5.2

Pin Description

Pin 4(A), 5(B) and 7(Index) are the incremental outputs. The incremental output has a resolution of 10-bit per

pole pair, resulting in a step length of 1.95µm.

Note that Pin 14 (CSn) must be low to enable the incremental outputs.

Pins 12, 13 and 14 are used for serial data transfer. Chip Select (CSn; active low) initiates serial data transfer.

CLK is the clock input and DO is the data output. A logic high at CSn puts the data output pin (DO) to tri-state

and terminates serial data transfer. CSn must be low to enable the incremental outputs. See 7.1.1 for further

options.

Pin 8 is the supply ground pin. Pins 18 and 19 are the positive supply pins.

For 5V operation, connect the 5V supply to pin 19 and add a 2µ2…10µF buffer capacitor at pin 19.

For 3.3V operation, connect both pins 18 and 19 to the 3.3V supply.

Pin 9 is used for factory programming only. It should be connected to VSS.

Pins 2 and 3 are the magnetic field change indicators, MagINCn and MagDECn (magnetic field strength increase

or decrease through variation of the distance between the magnet and the device). These outputs can be used

to detect the valid magnetic field range.

External pull-up resistors are required at these pins. See 6.3.2 for maximum output currents on these pins. Since

they are open-drain outputs they can also be combined (wired-and).

Pin 15 (PWM) allows a single wire output of the 12-bit absolute position value within one pole pair (2.0mm). The

value is encoded into a pulse width modulated signal with 1µs pulse width per step (1µs to 4097µs over one pole

pair).

Pins 6, 10, 11, 16, 17 and 20 are for internal use and must not be connected.