AS3524 datasheet(19/124 Pages) AMSCO

19 / 124 page

AS3524 C21 / C22

austriamicrosystems

Data Sheet, Confidential

www.austriamicrosystems.com

Revision 1.11

- 124

5.2.2 On-Chip ROM

5.2.2.1

ROM Controller

The ROM controller implements the AHB slave interface for accessing the ROM.

The ROM controller generates OK response for all reads and error response for all writes.

Access width is always 32 bits.

5.2.2.2

1MBIT ROM

128 KByte of on-chip mask-programmable ROM are included.

The ROM is metal mask programmable by a single mask change (VIA2).

The ROM contains the following firmware package

•

Boot loader

5.2.2.3

ROM versions and chip versions

There are two versions of the chip with changed Bootloader functionality available

•

Version C21: Bootloader supports basic function for boot from external Nor Flash (ST or ATMEL).

•

Version C22: Bootloader supports extended boot functions

These two chip versions differ only in the ROM content.

5.2.3 VIC – Vectored Interrupt Controller

The ARM PrimeCell™ PL190 “vectored interrupt controller” is included in the AHB system.

5.2.3.1

Features

•

AMBA specification Rev 2.0 compliant

•

support for 32 standard interrupts

•

support for 16 vectored interrupts

•

hardware interrupt priority

•

IRQ and FIQ generation

•

AHB mapped for fast interrupt response

•

software interrupt generation

•

test registers

•

raw interrupt status

•

interrupt request status

•

interrupt masking

•

privileged mode supportBlock Diagram

Figure 6 VIC Block Diagram

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