DS752PP8

Copyright 2009 Cirrus Logic

13

CS4970x4 Data Sheet

32-bit High Definition Audio Decoder DSP Family

5.9 Switching Characteristics — Internal Clock

5.10 Switching Characteristics — Serial Control Port - SPI Slave Mode

.

Parameter

Symbol

Min

Max

Unit

CS497004-CQZ

CS497004-CQZR

CS497024-CVZ

CS497024-CVZR

CS497024-CVZ

CS497024-CVZR

locked until the next power-on reset.

150

MHz

CS497004-CQZ

CS497004-CQZR

CS497024-CVZ

CS497024-CVZR

CS497024-CVZ

CS497024-CVZR

DCLKP

6.7

ns

Parameter

Symbol

Min

Typical

Max

Units

the actual maximum speed of the communication port may be limited by the firmware application. Flow control

using the SCP_BSY# pin should be implemented to prevent overflow of the input data buffer.At boot the

maximum speed is Fxtal/3.

-25

MHz

SCP_CS# falling to SCP_CLK rising

24

-

ns

SCP_CLK low time

20

-

ns

SCP_CLK high time

20

-

ns

Setup time SCP_MOSI input

5-

ns

Hold time SCP_MOSI input

5-

ns

SCP_CLK low to SCP_MISO output valid

-11

ns

SCP_CLK falling to SCP_IRQ# rising

-20

ns

SCP_CS# rising to SCP_IRQ# falling

0ns

SCP_CLK low to SCP_CS# rising

24

-

ns

SCP_CS# rising to SCP_MISO output high-Z

-20

ns

SCP_CLK rising to SCP_BSY# falling

ns