CPC7595MATR datasheet(12/24 Pages) CLARE

12 / 24 page

CPC7595

www.clare.com

R02

1.7 Digital I/O Electrical Specifications

Parameter

Test Conditions

Symbol

Minimum

Typical

Maximum

Unit

Input Characteristics

Input voltage, Logic low

Input voltage falling

VIL

0.8

1.1

Input voltage, Logic high

Input voltage rising

VIH

-1.7

2.0

Input leakage current,

INRINGING, INTESTin,

and INTESTout Logic high

VDD = 5.5 V, VBAT = -75 V, VIH = 2.4V

IIH

-0.1

μA

Input leakage current,

INRINGING, INTESTin,

and INTESTout Logic low

VDD = 5.5 V, VBAT = -75 V, VIL = 0.4V

IIL

-0.1

μA

Input leakage current,

LATCH Logic high

VDD = 4.5 V, VBAT = -75 V, VIH = 2.4V

IIH

μA

Input leakage current,

LATCH Logic low

VDD = 5.5 V, VBAT = -75 V, VIL = 0.4V

IIL

125

μA

Input leakage current,

TSD Logic high

VDD = 5.5 V, VBAT = -75 V, VIH = VDD

IIH

μA

Input leakage current,

TSD Logic low

VDD = 5.5 V, VBAT = -75 V, VIL = 0.4V

IIL

μA

Output Characteristics

Output voltage,

TSD Logic high

VDD = 5.5 V, VBAT = -75 V, ITSD = 10μAVTSD_off

2.4

VDD

-V

Output voltage,

TSD Logic low

VDD = 5.5 V, VBAT = -75 V, ITSD = 1mA

VTSD_on

-0

0.4

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