MCP4728 datasheet(49/66 Pages) MICROCHIP

49 / 66 page

DS22187C-page 49

MCP4728

6.9

Offset Error Drift

Offset error drift is the variation in offset error due to a

change in ambient temperature. The offset error drift is

typically expressed in ppm/oC.

6.10

Settling Time

The Settling time is the time delay required for the DAC

output to settle to its new output value from the start of

code transition, within specified accuracy. In the

MCP4728 device, the settling time is a measure of the

time delay until the DAC output reaches its final value

within 0.5 LSB when the DAC code changes from 400h

to C00h.

6.11

Major-Code Transition Glitch

Major-code transition glitch is the impulse energy

injected into the DAC analog output when the code in

the DAC register changes state. It is normally specified

as the area of the glitch in nV-Sec. and is measured

when the digital code is changed by 1 LSB at the major

carry transition (Example: 011...111 to 100...

000

, or 100... 000 to 011... 111).

6.12

Digital Feedthrough

Digital feedthrough is the glitch that appears at the

analog output caused by coupling from the digital input

pins of the device. The area of the glitch is expressed

in nV-Sec, and is measured with a full scale change

(Example: all 0s to all 1s and vice versa) on the digital

input pins. The digital feedthrough is measured when

the DAC is not being written to the output register. This

condition can be created by writing input register with

both UDAC bit and LDAC pin high.

6.13

Analog Crosstalk

Analog crosstalk is the glitch that appears at the output

of one DAC due to a change in the output of the other

DAC. The area of the glitch is expressed in nV-Sec,

and measured by loading one of the input registers with

a full scale code change (all 0s to all 1s and vice versa)

while keeping both UDAC bit and LDAC pin high. Then

bring down the LDAC pin to low and measure the

output of the DAC whose digital code was not changed.

6.14

DAC-to-DAC Crosstalk

DAC-to-DAC crosstalk is the glitch that appears at the

output of one DAC due to an input code change and

subsequent output change of the other DAC. This

includes both digital and analog crosstalks. The area of

the glitch is expressed in nV-Sec, and measured by

loading one of the input registers with a full scale code

change (all 0s to all 1s and vice versa) while keeping

UDAC bit or LDAC pin low.

6.15

Power-Supply Rejection Ratio

(PSRR)

PSRR indicates how the output of the DAC is affected

by changes in the supply voltage. PSRR is the ratio of

the change in VOUT to a change in VDD for full scale

output of the DAC. It is measured on one DAC that is

using an internal VREF while the VDD is varied +/- 10%,

and expressed in dB or µV/V.

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