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STM32F103CBU7TR Folha de dados(PDF) 56 Page - STMicroelectronics

Nome de Peças STM32F103CBU7TR
Descrição Electrónicos  Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces
PDF  92 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
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STM32F103CBU7TR Folha de dados(HTML) 56 Page - STMicroelectronics

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Electrical characteristics
STM32F103x8, STM32F103xB
56/92
Doc ID 13587 Rev 11
5.3.11
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/C101 standard.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
●
A supply overvoltage is applied to each power supply pin
●
A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latch-up standard.
Table 32.
ESD absolute maximum ratings
Symbol
Ratings
Conditions
Class
Maximum value(1)
1.
Based on characterization results, not tested in production.
Unit
VESD(HBM)
Electrostatic discharge
voltage (human body model)
TA +25 °C
conforming to
JESD22-A114
2
2000
V
VESD(CDM)
Electrostatic discharge
voltage (charge device
model)
TA +25 °C
conforming to
JESD22-C101
II
500
Table 33.
Electrical sensitivities
Symbol
Parameter
Conditions
Class
LU
Static latch-up class
TA +105 °C conforming to JESD78A
II level A



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