PCM5310PAP datasheet(35/103 Pages) TI

35 / 103 page

ZERO FLAG DETECTION

LRCK4

BCK4

DATA4

LRCK5

BCK5

DATA5

PORT-4

DAC12

DAC34

ZeroData

orNot

ZeroData

orNot

Increment

Counter

GPIOControl

GPIO1

GPIO2

GPIO3

Increment

Counter

PORT-5

AMUTE Control

PCM5310

www.ti.com ............................................................................................................................................................................................ SLES244 – FEBRUARY 2009

The PCM5310 detects continuous zero data input to either DAC12, DAC34, or both DAC12 and DAC34. The

GPIO pins can output the status to an external device by the register setting. The flag changes from low to high

when the L-and R-channel data are zero after 1024 fS. The descriptions for the zero flag detection registers are

shown in Table 22. Figure 42 shows the zero flag detection operation.

Table 22. Zero Flag Registers

GPIO1 selection

GSL1[4:0]

GPIO2 selection

GSL2[4:0]

GPIO3 selection

GSL3[4:0]

Figure 42. Zero Flag Detection

The PCM5310 has an AMUTE pin (pin 59) that controls the digital and analog mute function linked to Register 19

(13h). If these settings are disabled and the AMUTE pin goes from low to high, the PCM5310 holds the digital

and analog mute disabled. If these settings are enabled and the AMUTE pin goes from low to high, the

PCM5310 enables digital and analog mute. The mute function set by the AMUTE pin is effective, regardless of

the setting in Register 19.

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