LTC4264IDE datasheet(20/24 Pages) LINER

20 / 24 page

LTC4264

4264f

APPLICATIONS INFORMATION

Shutdown Interface

To disable the 25k signature resistor, connect SHDN to

the GND pin. Alternately, the SHDN pin can be driven

high with respect to VIN. Examples of interface circuits

that disable the signature and all LTC4264 functions are

shown in Figure 10, options 2 and 4. Note that the SHDN

input resistance is relatively large and the threshold volt-

age is fairly low. Because of high voltages present on the

printed circuit board, leakage currents from the GND pin

could inadvertently pull SHDN high. To ensure trouble-free

operation, use high voltage layout techniques in the vicinity

of SHDN. If unused, connect SHDN directly to VIN.

Load Capacitor

The IEEE 802.3af speciﬁcation requires that the PD maintain

a minimum load capacitance of 5µF. It is permissible to

have a much larger load capacitor and the LTC4264 can

charge very large load capacitors before thermal issues

become a problem. However, the load capacitor must not

be too large or the PD design may violate IEEE 802.3af

requirements. The LTC4264 maintains IEEE 802.3af com-

pliance when the load capacitor is 180µF or less. A larger

capacitor can be employed in a proprietary, close-system

high power application.

If the load capacitor is too large, there can be a prob-

lem with inadvertent power shutdown by the PSE. For

example, if the PSE is running at –57V (IEEE 802.3af

maximum allowed) and the PD is detected and powered

up, the load capacitor will be charged to nearly –57V. If

for some reason the PSE voltage is suddenly reduced to

–44V (IEEE 802.3af minimum allowed), the input bridge

will reverse bias and the PD power will be supplied by the

load capacitor. Depending on the size of the load capacitor

and the DC load of the PD, the PD will not draw any power

from the PSE for a period of time. If this period of time

exceeds the IEEE 802.3af 300ms disconnect delay, the

PSE will remove power from the PD. For this reason, it is

necessary to evaluate the load current and capacitance to

ensure that inadvertent shutdown cannot occur.

Refer also to Thermal Protection in this data sheet for

further discussion on load capacitor selection.

MAINTAIN POWER SIGNATURE

In an IEEE 802.3af system, the PSE uses the maintain

power signature (MPS) to determine if a PD continues to

require power. The MPS requires the PD to periodically

draw at least 10mA and also have an AC impedance less

than 26.25k

Ω in parallel with 0.05µF. If either the DC

current is less than 10mA or the AC impedance is above

26.25k

Ω, the PSE may disconnect power. The DC current

must be less than 5mA and the AC impedance must be

above 2M

Ω to guarantee power will be removed. The PD

application circuits shown in this data sheet present the

required AC impedance necessary to maintain power.

LAYOUT CONSIDERATIONS FOR THE LTC4264

The LTC4264 is relatively immune to layout problems.

Excessive parasitic capacitance on the RCLASS pin should

be avoided. Include an electrically isolated heat sink to

which the exposed pad on the bottom of the package can

be soldered. For optimum thermal performance, make the

heat sink as large as possible. Voltages in a PD can be as

large as –57V for PoE applications, so high voltage layout

techniques should be employed. The SHDN pin should

be separated from other high voltage pins, like GND and

LTC4264IDE Folha de dados(PDF) 20 Page - Linear Technology

LTC4264IDE Folha de dados(HTML) 20 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Folha de dados Download

Ligação URL