AT85C5122D-RDRUM datasheet(82/208 Pages) ATMEL

82 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Reset Value = X000 1000b

Reset Value = 0000 0000b

Table 49.

Smart Card Selection Register - SCSR (S:ABh)

BGTEN

CREPSEL

ALTKPS1

ALTKPS0

SCCLK1

SCRS

Bit Number

Bit Mnemonic

Description

Reserved

The value read from this bit is indeterminate. Do not change this bit.

6BGTEN

Block Guard Time Enable

Set this bit to select the minimum interval between the leading edge of the start bits of the last character

received from the ICC and the first character sent by the Terminal. The transfer of GT[8-0] value to the BGT

counter is done on the rising edge of the BGTEN.

Clear this bit to suppress the minimum time between reception and transmission.

Reserved

The value read from this bit is indeterminate. Do not change this bit.

CREPSEL

Character repetition selection

Clear this bit to select 5 times transmission (1 original + 4 repetitions) before parity error indication (conform to

EMV)

Set this bit to select 4 times transmission (1 original + 3 repetitions) before parity error indication

3-2

ALTKPS1:0

Alternate Card Clock prescaler factor

00 ALTKPS = 0: prescaler factor equals 1

01 ALTKPS = 1: prescaler factor equals 2

10 ALTKPS = 2: prescaler factor equals 4 (reset value)

11 ALTKPS = 3: prescaler factor equals 8

1SCCLK1

Alternate card clock selection

Set to select the prescaled PR3 clock for CCLK1 (P1.7) pin

Clear to select P1.7 port bit

SCRS

Smart Card Register Selection

The SCRS bit selects which set of the SCIB registers is accessed.

Table 50.

Smart Card Transmit / Receive Buffer - SCIBUF (S:AA)

Bit Number

Bit Mnemonic

Description

Smart Card Transmit / Receive Buffer

- A new byte can be written in the buffer to be transmitted on the I/O pin when SCTBE bit is set.

The bits are sorted and copied on the I/O pin versus the active convention.

- A new byte received from I/O pin is ready to be read when SCRI bit is set.

The bits are sorted versus the active convention.

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