TDA9530 datasheet(4/8 Pages) STMICROELECTRONICS

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TDA9530

4/8

TYPICAL APPLICATION

PC Board Lay-out

The best performance is obtained with a carefully

designed HF PC board, especially for the output

and input capacitors.

Rise/fall time and bandwidth are measured on

a 8pF load (including a PC board parasitical, sock-

et and a CRT capacitor).

The input voltage range for the cut-off adjustment

pins is from 1 to 4 volts and a 10 nF to 47 nF by-

pass capacitor is recommended on these pins.

Power Dissipation

The power dissipation is the sum of the DC and

the dynamic dissipation.

As the feedback resistors are integrated, the DC

power dissipation (capacitive load) can be estimat-

ed by:

PSTAT =VDD .IDD +VCC .ICC

The dynamic dissipation in worst case (full band-

width and black pixel/white pixel picture - see Note

3) is:

PDYN =3 VDD .CL .VOUT(PP) . f.K

where f is the video frequency and K the active line

duration / total duration.

Example:

for

VDD = 110V, VCC = 12V,

VOUT =40 VPP,IDD = 15mA, ICC = 40mA,

fVIDEO = 30MHz, CL = 8pF and K = 0.72.

We have: PSTAT = 2.13W and PDYN = 2.28W

Therefore: Ptot = 4.41W.

Note: 2 This worst thermal case must only be

considered for TJmax calculation.

Nevertheless, during the average life of the

circuit, the conditions are very close to the

white picture conditions.

TDA9530

Ω

IN1

VC.OFF1

IN2

VC.OFF2

IN3

VC.OFF3

C.OFF1

C.OFF2

C.OFF3

GND3

OUT3

GND2

GND1

OUT2

OUT1

Ω

GNDS

VDD

VCC

VDD 110V

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