H8SXSLASH1663M datasheet(935/1504 Pages) RENESAS

935 / 1504 page

Section 19 Serial Communication Interface (SCI, IrDA, CRC)

Rev. 2.00 Sep. 24, 2008 Page 903 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

Value

R/W

Description

ACS2

ACS1

ACS0

R/W

Asynchronous Mode Clock Source Select (valid when

CKE1 = 1 in asynchronous mode)

These bits select the clock source for the average

transfer rate function. When the average transfer rate

function is enabled, the base clock is automatically

specified regardless of the ABCS bit value.

000: External clock input

001: 115.152 kbps of average transfer rate specific to

φ = 10.667 MHz is selected (operated using the

base clock with a frequency 16 times the transfer

rate)

010: 460.606 kbps of average transfer rate specific to

φ = 10.667 MHz is selected (operated using the

base clock with a frequency 8 times the transfer

rate)

011: 720 kbps of average transfer rate specific to P

φ =

32 MHz is selected (operated using the base clock

with a frequency 16 times the transfer rate)

100: Setting prohibited

101: 115.196 kbps of average transfer rate specific to

φ = 16 MHz is selected (operated using the base

clock with a frequency 16 times the transfer rate)

110: 460.784 kbps of average transfer rate specific to

φ = 16 MHz is selected (operated using the base

clock with a frequency 16 times the transfer rate)

111: 720 kbps of average transfer rate specific to P

φ =

16 MHz is selected (operated using the base clock

with a frequency 8 times the transfer rate)

The average transfer rate only supports operating

frequencies of 10.667 MHz, 16 MHz, and 32 MHz.

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