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HD6417618A Folha de dados(PDF) 404 Page - Renesas Technology Corp

Nome de Peças HD6417618A
Descrição Electrónicos  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
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HD6417618A Folha de dados(HTML) 404 Page - Renesas Technology Corp

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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 6.00 Jun. 12, 2007 Page 372 of 610
REJ09B0131-0600
Error handling
Receive error handling
ER = 1?
BRK = 1?
Break handling
DR = 1?
Read receive data in SCFRDR
Clear DR, ER, BRK flags
in SCFSR,
and ORER flag in SCLSR, to 0
End
Yes
Yes
Yes
No
Overrun error handling
ORER = 1?
Yes
No
No
No
[1] Whether a framing error or parity error
has occurred in the receive data that
is to be read from SCFRDR can be
ascertained from the FER and PER
bits in SCFSR.
[2] When a break signal is received,
receive data is not transferred to
SCFRDR while the BRK flag is set.
However, note that the last data in
SCFRDR is H'00, and the break data
in which a framing error occurred is
stored.
Figure 14.8 Sample Flowchart for Receiving Serial Data (cont)



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