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HD6417618 Folha de dados(PDF) 253 Page - Renesas Technology Corp |
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HD6417618 Folha de dados(HTML) 253 Page - Renesas Technology Corp |
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253 / 646 page ![]() Section 10 Power-Down Modes Rev. 6.00 Jun. 12, 2007 Page 221 of 610 REJ09B0131-0600 10.3.4 Standby Control Register 4 (STBCR4) STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power- down mode. Bit Bit Name Initial Value R/W Description 7 to 5 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 4 MSTP23 0 R/W Module Stop Bit 23 When this bit is set to 1, the supply of the clock to the HIF is halted. 0: HIF operates 1: Clock supply to HIF halted 3 to 1 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 0 MSTP19 0 R/W Module Stop Bit 19 When this bit is set to 1, the supply of the clock to the EtherC and E-DMAC is halted. 0: EtherC and E-DMAC operate 1: Clock supply to EtherC and E-DMAC halted |
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