HD6417618 datasheet(56/646 Pages) RENESAS

Nome de Peças	HD6417618

Descrição Electrónicos	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

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Section 2 CPU

Rev. 6.00 Jun. 12, 2007 Page 24 of 610

REJ09B0131-0600

2.3

Data Formats

2.3.1

The size of register operands is always longwords (32 bits). When loading byte (8 bits) or word

(16 bits) data in memory into a register, the data is sign-extended to longword and stored in the

Longword

Figure 2.2 Register Data Format

2.3.2

Memory Data Formats

Memory data formats are classified into byte, word, and longword.

Byte data can be accessed from any address. If word data starting from boundary other than 2n or

longword data starting from a boundary other than 4n is accessed, an address error will occur. In

such cases, the data accessed cannot be guaranteed. See figure 2.3.

Byte 0

Byte 1

Byte 2

Byte 3

Word 0

Word 1

Longword

Big endian

Address A + 1

Address A + 4

Address A + 8

Address A

Address A + 3

Address A + 2

Byte 3

Byte 2

Byte 1

Byte 0

Word 1

Word 0

Longword

Little endian

Address A + 10

Address A + 4

Address A + 8

Address A + 11

Address A

Address A + 8

Address A + 9

Figure 2.3 Memory Data Format

Either big endian and little endian formats can be selected according to the mode pin setting at a

reset. For details on mode pin settings, see section 7, Bus State Controller (BSC).

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