SH7211 datasheet(39/1228 Pages) RENESAS

Nome de Peças	SH7211

Descrição Electrónicos	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

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Section 2 CPU

Rev. 2.00 May. 08, 2008 Page 15 of 1200

REJ09B0344-0200

Section 2 CPU

2.1

The register set consists of sixteen 32-bit general registers, four 32-bit control registers, and four

32-bit system registers.

2.1.1

General Registers

Figure 2.1 shows the general registers.

The sixteen 32-bit general registers are numbered R0 to R15. General registers are used for data

processing and address calculation. R0 is also used as an index register. Several instructions have

R0 fixed as their only usable register. R15 is used as the hardware stack pointer (SP). Saving and

restoring the status register (SR) and program counter (PC) in exception handling is accomplished

by referencing the stack using R15.

R0*1

R10

R11

R12

R13

R14

R15, SP (hardware stack pointer)*2

Notes: 1. R0 functions as an index register in the indexed register indirect addressing mode and indexed GBR indirect

addressing mode. In some instructions, R0 functions as a fixed source register or destination register.

2. R15 functions as a hardware stack pointer (SP) during exception processing.

Figure 2.1 General Registers

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