M30280FAHP datasheet(9/423 Pages) RENESAS

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A-2

5. Reset ..............................................................................................................32

5.1 Hardware Reset ..............................................................................................................32

5.1.1 Hardware Reset 1 .................................................................................................... 32

5.1.2 Hardware Reset 2 .................................................................................................... 32

5.2 Software Reset ............................................................................................................... 33

5.3 Watchdog Timer Reset ................................................................................................... 33

5.4 Oscillation Stop Detection Reset .................................................................................... 33

5.5 Voltage Detection Circuit ................................................................................................ 35

5.5.1 Low Voltage Detection Interrupt ............................................................................... 38

5.5.2 Limitations on Stop Mode ......................................................................................... 40

5.5.3 Limitations on WAIT Instruction ................................................................................ 40

6. Processor Mode .............................................................................................41

7. Clock Generation Circuit ................................................................................44

7.1 Main Clock ...................................................................................................................... 51

7.2 Sub Clock ....................................................................................................................... 52

7.3 On-chip Oscillator Clock ................................................................................................. 53

7.4 PLL Clock ....................................................................................................................... 53

7.5 CPU Clock and Peripheral Function Clock ..................................................................... 55

7.5.1 CPU Clock ................................................................................................................ 55

7.5.2 Peripheral Function Clock(f1, f2, f8, f32, f1SIO, f2SIO, f8SIO, f32SIO, fAD, fC32) ........... 55

7.6 Power Control ................................................................................................................. 56

7.6.1 Normal Operation Mode ........................................................................................... 56

7.6.2 Wait Mode ................................................................................................................ 57

7.6.3 Stop Mode ............................................................................................................... 59

7.7 System Clock Protective Function .................................................................................. 63

7.8 Oscillation Stop and Re-oscillation Detect Function ....................................................... 63

7.8.1 Operation when CM27 bit is set to "0" (Oscillation Stop Detection Reset) .............. 64

7.8.2 Operation when CM27 bit is set to "1" (Oscillation Stop and Re-oscillation Detect Interrupt) .... 64

7.8.3 How to Use Oscillation Stop and Re-oscillation Detect Function ............................. 65

8. Protection .......................................................................................................66

9. Interrupts ........................................................................................................67

9.1 Type of Interrupts ............................................................................................................ 67

9.1.1 Software Interrupts ................................................................................................... 68

9.1.2 Hardware Interrupts ................................................................................................. 69

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