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M66313FP Folha de dados(PDF) 3 Page - Renesas Technology Corp

Nome de Peças M66313FP
Descrição Electrónicos  32-Bit LED Driver with Shift Register and Latch
PDF  10 Pages
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M66313FP Folha de dados(HTML) 3 Page - Renesas Technology Corp

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M66313FP
REJ03F0179-0201 Rev.2.01 Mar 31, 2008
Page 3 of 9
Pin Arrangement
Parallel data
outputs
Serial data input
Output enable input
Latch enable input
Direct set input
Shift clock input
Serial data output
Parallel data
outputs
Parallel data
outputs
→ Q
7
→ Q
8
→ Q
9
→ Q
10
→ Q
11
→ Q
12
→ Q
13
→ Q
14
→ Q
15
→ Q
16
→ Q
17
→ Q
18
→ Q
19
→ Q
20
→ Q
21
→ Q
22
→ Q
23
→ Q
24
→ Q
25
→ Q
26
Q
7
Q
8
Q
9
Q
10
Q
11
Q
12
Q
13
Q
14
Q
15
Q
16
Q
17
Q
18
Q
19
Q
20
Q
21
Q
22
Q
23
Q
24
Q
25
Q
26
GND2
GND1
GND3
VCC
CK
→
S
D →
Q
1 ←
Q
2 ←
Q
3 ←
Q
4 ←
Q
5 ←
Q
6 ←
Q
27 ←
Q
28 ←
Q
29 ←
Q
30 ←
Q
31 ←
Q
32 ←
SQ32 ←
OE →
LE →
A
→
CK
Q
1
SQ
32
S
D
Q
4
Q
3
Q
6
Q
5
Q
2
Q
27
Q
30
Q
29
Q
32
Q
31
Q
28
OE
LE
A
4
1
2
3
5
39
42
41
40
38
6
7
37
36
8
35
9
34
10
33
11
32
12
31
13
14
30
29
15
16
28
27
17
26
18
25
19
24
20
23
21
22
(Top view)
Outline: 42P2R-A
M66313FP
Parallel data
outputs
Functional Description
The employment of silicon gate CMOS process of the M66313FP guarantees low power dissipation and maintains high
noise margin as well as high output current and high speed required to drive LEDs.
Each shift register bit consists of a flip-flop for shifting and an output latch.
The shift operation takes place when the clock input CK changes from low-level to high-level.
The serial data input A corresponds to the data input of the first-stage shift register, and the shift register is shifted in
sequence when a pulse is applied to CK.
The parallel outputs
Q
1 to Q32 are open-drain outputs.
If the latch-enable input
LE is turned high–level, the content of the shift register at that instant is latched.
To expand the number of bits, use the serial data output SQ32 which shows the output of the shift register of the 32nd bit.
If the direct set input
S
D is turned low-level, shift register and latches are set.
If the high-level input is applied to the output enable input
OE, Q
1 to Q32 are set to the high-impedance state, but SQ32 is
not set to the high-impedance state. The shift operation is not affected when
OE is changed.



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