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STW8019 Folha de dados(PDF) 51 Page - STMicroelectronics |
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STW8019 Folha de dados(HTML) 51 Page - STMicroelectronics |
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51 / 66 page ![]() Bus interface STw8009/STw8019 50/65 6.2 YcbCr bus Figure 21. YcbCr bus format Figure 22. Data bus timing Cb4 Y3 Cr2 Y2 Cb2 Y1 Cr0 Y0 Cb0 Clk YCbCr[7:0] Table 22. YcBCr data bus timing ( Figure 22) Symbol Parameter Test conditions Min. Typ. Max. Unit CLK27M Clock frequency 27 MHz CLKdc Clock duty cycle 45 55 % th Data input hold time 3 ns ts Data input setup time 1.5 ns CCIR data CLK27M ts: CCIR data to CLK27M setup time th: CCIR data to CLK27M hold time 1V8 GND th ts |
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