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STKM2000 Folha de dados(PDF) 4 Page - STMicroelectronics

Nome de Peças STKM2000
Descrição Electrónicos  2 u/2 POLY/2 METAL BiCMOS MIXED ANALOG-DIGITAL STANDARD CELLS
PDF  10 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STKM2000 Folha de dados(HTML) 4 Page - STMicroelectronics

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CAD SUPPORT: A.D.S. (Analog Design System)
SGS-THOMSON Microelectronics has introduced
a sophisticated CAD approach to reduce the
development leadtime and to increase design
flexibility and safety.
Programmable cells in the library are defined as:
q
alternative cell or,
q
adjustable cell or,
q
telescopic cell or,
q
parametrisable cell
Some specific parts of the design are automatically
handled by an analog design manager, in order to:
q
reduce capture errors
q
make unexperienced designer’s task easier
q
improve schematics lisibility
q
check electrical design rules (Analog or Digital)
The Analog Design manager takes into account:
q
transconductance block generation
q
automatic cell biasing
q
unconnected pins and power down processing
q
multipower supplies processing
A major step has been made with the introduction
of function generator and compiler approaches to
improve design automation and design efficiency.
Operational amplifier generator
From a generic symbol and some properties,
several parameters of the amplifier will be adjusted:
q
Biasing current which controls major parameters
of amplifier (gain-bandwidth, slew rate, power
consumption).
q
Frequency compensation which allows to adjust
and optimize the dynamic parameters versus the
capacitive and resistive load.
q
Power down capabilities.
q
Supply voltage of the cell.
A specific software manages all these properties
and automatically updates all libraries included in
the design flow: macro models and transistor level
models, footprint, GDS2 layout, LVS netlist.
Figure 3: Analog Design System (A.D.S.) flow
Digital Analog
Symbols
Schematic
Capture
Data Base
Filter Compiler
DIGITAL
Generator
D
Netlist
Extractor
Analog Generator
G
G
Programmable Cells
Generation
G
Behavioral
Models
Top Level
Simulation
SABER
Digital
Models
D
G
Transistor
Models
Place & Route
Cells Boxes
G
Analog
Simulation
ST SPICE
Digital
Simulation
HILO 3
Back Annotation
GDSII File
DRC/LVS
Cells
Layout
G
PG Tape
®
STKM2000 SERIES
4/10



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