AT89S53_00 datasheet(19/33 Pages) ATMEL

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AT89S53

Programming the Flash

Atmel’s AT89S53 Flash Microcontroller offers 12K bytes of

in-system reprogrammable Flash Code memory.

The AT89S53 is normally shipped with the on-chip Flash

Code memory array in the erased state (i.e. contents =

FFH) and ready to be programmed. This device supports a

High-Voltage (12V) Parallel programming mode and a Low-

Voltage (5V) Serial programming mode. The serial pro-

gramming mode provides a convenient way to download

the AT89S53 inside the user’s system. The parallel pro-

gramming mode is compatible with conventional third party

Flash or EPROM programmers.

The Code memory array occupies one contiguous address

space from 0000H to 2FFFH.

The Code array on the AT89S53 is programmed byte-by-

byte in either programming mode. An auto-erase cycle is

provided with the self-timed programming operation in the

serial programming mode. There is no need to perform the

Chip Erase operation to reprogram any memory location in

the serial programming mode unless any of the lock bits

have been programmed.

In the parallel programming mode, there is no auto-erase

cycle. To reprogram any non-blank byte, the user needs to

use the Chip Erase operation first to erase the entire Code

memory array.

Parallel Programming Algorithm: To program and verify

the AT89S53 in the parallel programming mode, the follow-

ing sequence is recommended:

Power-up sequence:

Apply power between V

CC and GND pins.

Set RST pin to “H”.

Apply a 3 MHz to 24 MHz clock to XTAL1 pin and wait

for at least 10 milliseconds.

Set PSEN pin to “L”

ALE pin to “H”

EA pin to “H” and all other pins to “H”.

Apply the appropriate combination of “H” or “L” logic

levels to pins P2.6, P2.7, P3.6, P3.7 to select one of

the programming operations shown in the Flash

Programming Modes table.

Apply the desired byte address to pins P1.0 to P1.7

and P2.0 to P2.5.

Apply data to pins P0.0 to P0.7 for Write Code

operation.

Raise EA/V

PP to 12V to enable Flash programming,

erase or verification.

Pulse ALE/PROG once to program a byte in the

Code memory array, or the lock bits. The byte-write

cycle is self-timed and typically takes 1.5 ms.

To verify the byte just programmed, bring pin P2.7

to “L” and read the programmed data at pins P0.0 to

P0.7.

Repeat steps 3 through 7 changing the address and

data for the entire 12K-byte array or until the end of

the object file is reached.

Power-off sequence:

Set XTAL1 to “L”.

Set RST and EA pins to “L”.

Turn V

CC power off.

Data Polling: The AT89S53 features DATA Polling to indi-

cate the end of a write cycle. During a write cycle in the

parallel or serial programming mode, an attempted read of

the last byte written will result in the complement of the writ-

ten datum on P0.7 (parallel mode), and on the MSB of the

serial output byte on MISO (serial mode). Once the write

cycle has been completed, true data are valid on all out-

puts, and the next cycle may begin. DATA Polling may

begin any time after a write cycle has been initiated.

Ready/Busy: The progress of byte programming in the

parallel programming mode can also be monitored by the

RDY/BSY output signal. Pin P3.4 is pulled Low after ALE

goes High during programming to indicate BUSY. P3.4 is

pulled High again when programming is done to indicate

READY.

Program Verify: If lock bits LB1 and LB2 have not been

programmed, the programmed Code can be read back via

the address and data lines for verification. The state of the

lock bits can also be verified directly in the parallel pro-

gramming mode. In the serial programming mode, the state

of the lock bits can only be verified indirectly by observing

that the lock bit features are enabled.

Chip Erase: In the parallel programming mode, chip erase

is initiated by using the proper combination of control sig-

nals and by holding ALE/PROG low for 10 ms. The Code

array is written with all “1”s in the Chip Erase operation.

In the serial programming mode, a chip erase operation is

initiated by issuing the Chip Erase instruction. In this mode,

chip erase is self-timed and takes about 16 ms.

During chip erase, a serial read from any address location

will return 00H at the data outputs.

Serial Programming Fuse: A programmable fuse is avail-

able to disable Serial Programming if the user needs

maximum system security. The Serial Programming Fuse

can only be programmed or erased in the Parallel Program-

ming Mode.

The AT89S53 is shipped with the Serial Programming

Mode enabled.

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