AT89C5132-ROTIL datasheet(130/182 Pages) ATMEL

130 / 182 page

130

4173E–USB–09/07

AT89C5132

Reset Value = 0001 0100b

Note:

1. When the SPI is disabled, SCK outputs high level.

Table 99. SPSTA Register

SPSTA (S:C4h) – SPI Status Register

Reset Value = 00000 0000b

Table 100. SPDAT Register

SPDAT (S:C5h) – Synchronous Serial Data Register

Reset Value = XXXX XXXXb

1 - 0

SPR1:0

SPI Rate Bits 0 and 1

Refer to Table 97 for bit rate description.

SPIF

WCOL

MODF

Bit Number

Bit

Mnemonic

Description

SPIF

SPI Interrupt Flag

Set by hardware when an 8-bit shift is completed.

Cleared by hardware when reading or writing SPDAT after reading SPSTA.

WCOL

Write Collision Flag

Set by hardware to indicate that a collision has been detected.

Cleared by hardware to indicate that no collision has been detected.

Reserved

The values read from this bit is indeterminate. Do not set this bit.

MODF

Mode Fault

Set by hardware to indicate that the SS pin is at an appropriate level.

Cleared by hardware to indicate that the SS pin is at an inappropriate level.

3:0

Reserved

The values read from these Bits are indeterminate. Do not set these Bits.

SPD7

SPD6

SPD5

SPD4

SPD3

SPD2

SPD1

SPD0

Bit Number

Bit

Mnemonic

Description

7 - 0

SPD7:0

Synchronous Serial Data

Bit Number

Bit

Mnemonic

Description

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