ADE5166 datasheet(62/148 Pages) AD

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ADE5166/ADE5169/ADE5566/ADE5569

Preliminary Technical Data

Rev. PrB | Page 62 of 148

Integration Time Under Steady Load: Reactive Energy

As mentioned in the Active Energy Calculation section, the

discrete time sample period (T) for the accumulation register is

1.22 μs (5/MCLK). With full-scale sinusoidal signals on the

analog inputs and the VARGAIN and VARDIV registers set to

0x000, the integration time before the reactive energy register

overflows is calculated in Equation 24.

Time =

min

sec

409

0xCCCCD

FFFF

FFFF,

0xFFFF,

(24)

When VARDIV is set to a value different from 0, the integration

time varies, as shown in Equation 25.

VARDIV

Time

WDIV

(25)

Reactive Energy Accumulation Modes

VAR Signed Accumulation Mode

The ADE5569/ADE5169 reactive energy default accumulation

mode is a signed accumulation based on the reactive power

information.

VAR Antitamper Accumulation Mode

The ADE5569/ADE5169 are placed in VAR antitamper accumula-

tion mode by setting the SAVARM bit in the ACCMODE register

(0x0F). In this mode, the reactive power is accumulated depending

on the sign of the active power. When active power is positive,

the reactive power is added as it is to the reactive energy register.

When active power is negative, the reactive power is subtracted

from the reactive energy accumulator (see Figure 51). The CF

pulse also reflects this accumulation method when in this mode.

The default setting for this mode is off. Transitions in the direction

of power flow and no load threshold are active in this mode.

POS

INTERRUPT STATUS REGISTERS

NEG

APSIGN FLAG

ACTIVE POWER

NO LOAD

THRESHOLD

NO LOAD

THRESHOLD

REACTIVE ENERGY

NO LOAD

THRESHOLD

REACTIVE POWER

NO LOAD

THRESHOLD

Figure 51. Reactive Energy Accumulation in

Antitamper Accumulation Mode

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