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DSP56F826 Folha de dados(PDF) 27 Page - Freescale Semiconductor, Inc |
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DSP56F826 Folha de dados(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 60 page ![]() Flash Memory Characteristics 56F827 Technical Data, Rev. 12 Freescale Semiconductor 27 Figure 3-5 Signal States 3.5 Flash Memory Characteristics Table 3-5 Flash Memory Truth Table Mode XE1 1. X address enable, all rows are disabled when XE = 0 YE2 2. Y address enable, YMUX is disabled when YE = 0 SE3 3. Sense amplifier enable OE4 4. Output enable, tri-state Flash data out bus when OE = 0 PROG5 5. Defines program cycle ERASE6 6. Defines erase cycle MAS17 7. Defines mass erase cycle, erase whole block NVSTR8 8. Defines non-volatile store cycle Standby L L L L L L L L Read H HHH L L L L Word Program H H L L H L L H Page Erase H L L L L H L H Mass Erase H L L L L H H H Table 3-6 IFREN Truth Table Mode IFREN = 1 IFREN = 0 Read Read information block Read main memory block Word program Program information block Program main memory block Page erase Erase information block Erase main memory block Mass erase Erase both block Erase main memory block Data Invalid State Data1 Data2 Valid Data Tri-stated Data3 Valid Data2 Data3 Data1 Valid Data Active Data Active |
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