ST6201CB6 datasheet(30/70 Pages) STMICROELECTRONICS

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ST62T00C/T01C ST62T03C/E01C

3.5 POWER SAVING MODES

The WAIT and STOP modes have been imple-

mented in the ST62xx family of MCUs in order to

reduce the product’s electrical consumption during

idle periods. These two power saving modes are

described in the following paragraphs.

In addition, the Low Frequency Auxiliary Oscillator

(LFAO) can be used instead of the main oscillator

to reduce power consumption in RUN and WAIT

modes.

3.5.1 WAIT Mode

The MCU goes into WAIT mode as soon as the

WAIT instruction is executed. The microcontroller

can be considered as being in a “software frozen”

state where the core stops processing the pro-

gram instructions, the RAM contents and peripher-

al registers are preserved as long as the power

supply voltage is higher than the RAM retention

voltage. In this mode the peripherals are still ac-

tive.

WAIT mode can be used when the user wants to

reduce the MCU power consumption during idle

periods, while not losing track of time or the capa-

bility of monitoring external events. The active os-

cillator (main oscillator or LFAO) is not stopped in

order to provide a clock signal to the peripherals.

Timer counting may be enabled as well as the

Timer interrupt, before entering the WAIT mode:

this allows the WAIT mode to be exited when a

Timer interrupt occurs. The same applies to other

peripherals which use the clock signal.

If the power consumption has to be further re-

duced, the Low Frequency Auxiliary Oscillator

(LFAO) can be used in place of the main oscillator,

if its operating frequency is lower. If required, the

LFAO must be switched on before entering the

WAIT mode.

If the WAIT mode is exited due to a Reset (either

by activating the external pin or generated by the

Watchdog), the MCU enters a normal reset proce-

dure. If an interrupt is generated during WAIT

mode, the MCU’s behaviour depends on the state

of the processor core prior to the WAIT instruction,

but also on the kind of interrupt request which is

generated. This is described in the following para-

graphs. The processor core does not generate a

delay following the occurrence of the interrupt, be-

cause the oscillator clock is still available and no

stabilisation period is necessary.

3.5.2 STOP Mode

If the Watchdog is disabled, STOP mode is availa-

ble. When in STOP mode, the MCU is placed in

the lowest power consumption mode. In this oper-

ating mode, the microcontroller can be considered

as being “frozen”, no instruction is executed, the

oscillator is stopped, the RAM contents and pe-

ripheral registers are preserved as long as the

power supply voltage is higher than the RAM re-

tention voltage, and the ST62xx core waits for the

occurrence of an external interrupt request or a

Reset to exit the STOP state.

If the STOP state is exited due to a Reset (by acti-

vating the external pin) the MCU will enter a nor-

mal reset procedure. Behaviour in response to in-

terrupts depends on the state of the processor

core prior to issuing the STOP instruction, and

also on the kind of interrupt request that is gener-

ated.

This case will be described in the following para-

graphs. The processor core generates a delay af-

ter occurrence of the interrupt request, in order to

wait for complete stabilisation of the oscillator, be-

fore executing the first instruction.

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