ST52T400FMPY datasheet(59/94 Pages) STMICROELECTRONICS

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ST52T400/T440/E440/T441

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9.3 Timer Interrupt

The TIMER can be programmed to generate an

Interrupt request until the end of the count or when

there is an Timer Stop signal (TSTRT). The Timer

can generate programmable Interrupts into 4 dif-

ferent modes:

Interrupt mode 1: Interrupt on Timer Stop.

Interrupt mode 2: Interrupt on Rising Edge of

TIMEROUT.

Interrupt mode 3: Interrupt on Falling Edge of

TIMEROUT.

Interrupt mode 4: Interrupt on both edges of

TIMEROUT.

The Interrupt mode can be selected by means of

INTSL and INTE bits of the REG_CONF5.

NOTE:

the interrupt on TIMEROUT rising edge is

also generated after the Start.

WARNING:

If the PWM/Timer is configured with

the Interrupt on Stop and the Start/Stop is

configured as external, a low signal in the STRT

pin determines a PWM/Timer interrupt even if the

peripheral is off. If the interrupt is configured on

falling edge, a reset signal generates an interrupt

request.

Reset Configuration = “00000000”

Table 9.1 Configuration Register 5 Description

Bit

Name

Value

Description

TIRST

Internal RESET

Internal SET

TERST

External RESET on Level

External RESET on Edge

TISTR

Internal STOP

Internal START

TESTR

External START on Level

External START on Edge

INTE

TIMER Interrupt on TIMEROUT Falling Edge

TIMER Interrupt on TIMEROUT Rising Edge

TIMER Interrupt on Both Edges of TIMEROUT

- not used

INTSL

TIMER Interrupt on Counter Stop

TIMER Interrupt on TIMEROUT Edges

TMODE

TIMER MODE

PWM MODE

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