WM8580 datasheet(80/103 Pages) WOLFSON

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WM8580 Folha de dados(PDF) 80 Page - Wolfson Microelectronics plc

Nome de Peças	WM8580

Descrição Electrónicos	Multichannel CODEC with S/PDIF Transceiver

PDF	103 Pages

Scroll/Zoom	100%

Fabricante Electrônico	WOLFSON [Wolfson Microelectronics plc]

Página de início	http://www.wolfsonmicro.com

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80 / 103 page

WM8580

Production Data

PD Rev 4.5 February 2008

SLAVE MODE

If the S/PDIF Rx interface is enabled, then an internal MCLK is generated at 256fs. This internal

clock will act as a source clock for ADC, DACs and PAIF. The user is required to supply input clocks

to the PAIFTX_BCLK and the PAIF_LRCLK.

If the PAIF or DACs source the S/PDIF Rx interface then the PAIFTX_BCLK and the PAIF_LRCLK

input clocks must be synchronous to clock driving the S/PDIF interface. If these clocks cannot be

guaranteed synchronous then this mode of operation is not recommended.

If the PAIF sources the ADC data, then the user must supply input clocks to ADCCLK,

PAIFTX_BCLK and the PAIF_LRCLK pins.

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