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SPT
3
3/11/97
SPT7910
Typical thermal impedances (unsoldered, in free air): 32L sidebrazed DIP.
θ
ja = 50 °C/W.
164 distortion BINS from 4096 pt FFT.
2fIN = 1 MHz.
3fIN = 3.58 and 4.35 MHz.
ELECTRICAL SPECIFICATIONS
TA=TMIN to TMAX, VCC=+5.0 V, VEE=-5.2 V, DVCC=+5.0 V, VIN=±2.0 V, VSB=-2.0 V, VST=+2.0 V, fCLK=10 MHz, 50% clock duty cycle,
unless otherwise specified.
TEST
TEST
SPT7910
PARAMETERS
CONDITIONS
LEVEL
MIN
TYP
MAX
UNITS
Dynamic Performance
Signal-To-Noise Ratio
(without Harmonics)
fIN=500 kHz
+25
°C
I
64
67
dB
TMIN to TMAX
IV
58
61
dB
fIN=1 MHz
+25
°C
I
64
66
dB
TMIN to TMAX
IV
58
60
dB
fIN=3.58 MHz
+25
°C
I
62
64
dB
TMIN to TMAX
IV
58
60
dB
Harmonic Distortion1
fIN=500 kHz
+25
°C
I
63
66
dB
TMIN to TMAX
IV
59
62
dB
fIN=1.0 MHz
+25
°C
I
63
65
dB
TMIN to TMAX
IV
59
61
dB
fIN=3.58 MHz
+25
°C
I
59
61
dB
TMIN to TMAX
IV
57
59
dB
Signal-to-Noise and Distortion
fIN=500 kHz
+25
°C
I
60
63
dB
TMIN to TMAX
IV
55
58
dB
fIN=1.0 MHz
+25
°C
I
60
62
dB
TMIN to TMAX
IV
55
57
dB
fIN=3.58 MHz
+25
°C
I
57
59
dB
TMIN to TMAX
IV
54
56
dB
Spurious Free Dynamic Range2
+25
°C
V
74
dB
Differential Phase3
+25
°C
V
0.2
Degree
Differential Gain3
+25
°C
V
0.7
%
Digital Inputs
Logic 1 Voltage
VI
-1.1
V
Logic 0 Voltage
VI
-1.5
V
Maximum Input Current Low
VI
-500
±200
+750
µA
Maximum Input Current High
VI
-500
±300
+750
µA
Pulse Width Low (CLK)
IV
30
ns
Pulse Width High (CLK)
IV
30
300
ns
Digital Outputs
Logic 1 Voltage
50
Ω to -2 V
VI
-1.1
-0.8
V
Logic 0 Voltage
50
Ω to -2 V
VI
-1.8
-1.5
V
Power Supply Requirements
Voltages
VCC
IV
+4.75
+5.25
V
-VEE
IV
-4.95
-5.45
V
Currents
ICC
VI
150
190
mA
-IEE
VI
125
160
mA
Power Dissipation
Outputs Open
VI
1.4
1.8
W
Power Supply Rejection Ratio
(5 V
±0.25 V, -5.2 V ±0.25 V)
V
1.0
LSB
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