74LVC2G08

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 13 — 28 October 2016

9 of 22

NXP Semiconductors

74LVC2G08

Dual 2-input AND gate

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistance

CL = Load capacitance including jig and probe capacitance

RT = Termination resistance should be equal to output impedance Zo of the pulse generator

VEXT = Test voltage for switching times

Fig 10. Test circuit for measuring switching times

Table 10.

Test data

Supply voltage

Input

Load

VEXT

VCC

VI

tr, tf

CL

RL

tPLH, tPHL

1.65 V to 1.95 V

VCC

 2.0 ns

30 pF

1 k



open

2.3 V to 2.7 V

VCC

 2.0 ns

30 pF

500



open

2.7 V

2.7 V

 2.5 ns

50 pF

500



open

3.0 V to 3.6 V

2.7 V

 2.5 ns

50 pF

500



open

4.5 V to 5.5 V

VCC

 2.5 ns

50 pF

500



open