74LVC1G74

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 13 — 5 December 2016

13 of 25

NXP Semiconductors

74LVC1G74

Single D-type flip-flop with set and reset; positive edge trigger

Test data is given in Table 11.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 10. Test circuit for measuring switching times

Table 11.

Test data

Supply voltage

Input

Load

VEXT

VCC

VI

tr, tf

CL

RL

tPLH, tPHL

tPZH, tPHZ

tPZL, tPLZ

1.65 V to 1.95 V

VCC

 2.0ns

30pF

1k



open

GND

2VCC

2.3 V to 2.7 V

VCC

 2.0 ns

30 pF

500



open

GND

2VCC

2.7 V

2.7 V

 2.5 ns

50 pF

500



open

GND

6 V

3.0 V to 3.6 V

2.7 V

 2.5 ns

50 pF

500



open

GND

6 V

4.5 V to 5.5 V

VCC

 2.5 ns

50 pF

500



open

GND

2VCC